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Network-on-Chip
A proper scheduling of cores for testing is necessary to perform their testing
in an efficient manner.
Apart from this scheduling problem, it is also necessary to have a proper
interface between the cores and the network links. The cores may have different numbers of input–output lines, compared to the link width. This is taken
care of by putting the cores inside test wrappers discussed in Section 8.3.1.
8.3.1 Core Wrapper Design
In a SoC test environment, individual cores need to be encapsulated within
a wrapper. A wrapper is an integral part of IEEE 1500 working group proposal. It is a layer of design-for-testability (DfT) logic that connects the TAM
to a core under test. The 1500 wrapper has four main functions: Normal operation, Intest (testing of core itself), Extest (core external test, such as testing of
interconnects originating from or ending at the core), and Bypass. The typical
structure of 1500 wrapper (Marinissen et al. 2002) is shown in Figure 8.6.
The core designers, at the time of designing the core, also incorporate
some DfT features in it in the form of scan chains. The number of scan
chains created is often dependent on the core designer. Apart from these
scan inputs, a test pattern contains bits for the primary inputs as well.
Hence, application of a test pattern necessarily means filling up the scan
flip-flops and primary inputs of the core. The total time needed for this
depends upon the NoC channel width (flit size), the maximum length of
scan chain, the total number of scan chains, and the number of primary
inputs and outputs. A wrapper for a core combines the core internal scan
chains, primary inputs, and primary outputs into wrapper scan chains.
Ideally, all the wrapper chains should be of equal length. Moreover, the
total number of wrapper chains should be equal to the flit size, such that
each flit can fill up exactly one bit of a scan chain. If the length of the longest wrapper chain is n, after n flits, one full test pattern will get loaded
into the scan chains. The pattern is then applied to the core. Responses
are collected into the wrapper scan chains and are shifted out as flits to
the test sink. Figure 8.7 shows two wrapper chains. Both the figures create
two wrapper chains. The first one is unbalanced, in which one chain is of
length 6, whereas the other one is of length 18. The second design is more
balanced—both the chains are of length 12.
The number of flits for a test pattern is dependent upon the maximum
length of scan chains. Partitioning of core scan chains, primary inputs, and
outputs into wrapper chains constitute a major role in determining this maximum wrapper scan chain length. Given a flit size, determining the scan partitioning to optimize the overall test time is NP-hard (Marinissen et al. 2000).
The wrapper design problem has been addressed in the work of Iyengar and
Chakrabarty (2002). The overall problem can be stated as follows:
Given a core with n functional inputs, m functional outputs, and sc internal scan chain of lengths l 1 , l 2 ,…, l sc , respectively, and NoC channel width k,