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Testing of Network-on-Chip Architectures
8.2.1 Testing NoC Links
Cuivello et  al. (1999) suggested a novel fault model for links in the deep
submicron (DSM) technology. The model, known as maximum aggressor fault
(MAF) model, corresponds to the crosstalk effects between a set of parallel
lines in DSM SoCs. This model has been discussed in detail in Chapter 7
(Figure 7.2). In this model, a signal transition in one single line (known as
victim line) is affected through crosstalk by transitions in the neighboring
lines (known as aggressors). For a link with N wires, in the worst case, a
victim line can get affected by transitions in the (N – 1) aggressors. As it
can be observed from Figure  7.2, each line can be affected in six different
ways. Thus, testing a single line needs six two-pattern tests. For example, if
we assume a three-wire model (in which the middle wire is the victim and
the other two are aggressors), to test a delayed rise case, we need to apply the
pattern 101 followed by 010. For a link with large number of wires (which
is common for NoC) and sufficiently wide neighborhood, this requires a
prohibitive amount of test effort to ensure good test coverage (Bushnell and
Agrawal 2005).
The test sequence for link testing using the MAF model exhibits some
important properties that can be utilized in compact and efficient design of
test packets:
1. In each test vector, the logic value in the victim line is the complement of that in the aggressor lines. All aggressor lines are assigned
the same logic value. This is required to have the maximum aggression effect on the victim.
2. After applying an exhaustive set of test sequences for a victim, the
sequence for testing the next line can be obtained easily by shifting or rotating the test patterns in the previous sequence by exactly
one bit.
3. Transition from one test vector to another can often be concatenated
such that the total number of test vectors needed to test the MAF
faults gets reduced. For example, the “Fast-to-fall” needs the test vector 111 followed by 000, whereas the “Fast-to-rise” needs the test vector 000 followed by 111. Thus, the three-vector sequence 111–000–111
can test both the faults, reducing the required number of test vectors
from four to three. As shown in Table 8.1, instead of requiring 12 vectors per wire, application of only 8 vectors per wire suffices to check
all six MAF faults.
The MAF tests can be carried out in eight distinct states, s1–s8, as shown in
Figure 8.1. The finite-state machine shown in the figure generates eight different patterns in a cyclical fashion. Thus, in one cycle, one line can be tested
as a victim, whereas the others act as aggressors. The selection of the victim
wire can be achieved through the victim-line counter field that controls the