156
Network-on-Chip
where:
α is the switching activity factor
C L is the load capacitance
V swing is the voltage swing on the output node
V DD is the supply voltage of the gate
f clock is the clock frequency
Switching activity factor (α) is the probability that a clock event results in a
0 → 1 event at the output of the gate and its maximum value is 1 (for clock
b uffer). Load capacitance (C L ) is the summation of the output capacitance of the
driver, the wiring capacitance, and the input capacitance of the loading gate.
Internal power, however, consists of a short-circuit power that occurs when
both n-type metal oxide semiconductor and p-type metal oxide semiconductor transistors are ON, and an internal node switching power that is required
to charge the internal capacitance of the cell. The internal power consumption can be described as
P int = t sc × V DD × I peak × f clock
(6.2)
where:
t sc is the time duration of the short-circuit current
I peak is the total internal switching current (the short-circuit current + the
current required to charge the internal capacitance)
Leakage power of a chip is consumed when the device is powered ON but no
signals are changing value. There are four main sources of leakage current in
a complementary metal oxide semiconductor (CMOS) gate as follows:
1. Subthreshold leakage current (I sub ) flows from drain to source of a transistor operating in the weak inversion region where the gate is not
completely turned off. I sub increases exponentially with increasing
temperature and decreasing threshold voltage (V t ) of the transistor.
The expression for I sub can be written as follows:
2
⎛ W
⎞
I
=µ ×
C
×
(
V
VGS − Vt ) nVt h
sub
ox
th ×
⎜ ⎟ × e
(6.3)
⎝
L
⎠
where:
W and L are the channel width and length of a transistor, respectively
V th is the thermal voltage given by kT/q (25.9 mV at room temperature)
The parameter n is a function of the device fabrication process and
ranges from 1.0 to 2.5
The parameter μ represents the career mobility
C ox denotes the gate oxide capacitance per unit area
k denotes Boltzman constant = 1.3806 × 10 –23 J/K
Network-on-Chip
where:
α is the switching activity factor
C L is the load capacitance
V swing is the voltage swing on the output node
V DD is the supply voltage of the gate
f clock is the clock frequency
Switching activity factor (α) is the probability that a clock event results in a
0 → 1 event at the output of the gate and its maximum value is 1 (for clock
b uffer). Load capacitance (C L ) is the summation of the output capacitance of the
driver, the wiring capacitance, and the input capacitance of the loading gate.
Internal power, however, consists of a short-circuit power that occurs when
both n-type metal oxide semiconductor and p-type metal oxide semiconductor transistors are ON, and an internal node switching power that is required
to charge the internal capacitance of the cell. The internal power consumption can be described as
P int = t sc × V DD × I peak × f clock
(6.2)
where:
t sc is the time duration of the short-circuit current
I peak is the total internal switching current (the short-circuit current + the
current required to charge the internal capacitance)
Leakage power of a chip is consumed when the device is powered ON but no
signals are changing value. There are four main sources of leakage current in
a complementary metal oxide semiconductor (CMOS) gate as follows:
1. Subthreshold leakage current (I sub ) flows from drain to source of a transistor operating in the weak inversion region where the gate is not
completely turned off. I sub increases exponentially with increasing
temperature and decreasing threshold voltage (V t ) of the transistor.
The expression for I sub can be written as follows:
2
⎛ W
⎞
I
=µ ×
C
×
(
V
VGS − Vt ) nVt h
sub
ox
th ×
⎜ ⎟ × e
(6.3)
⎝
L
⎠
where:
W and L are the channel width and length of a transistor, respectively
V th is the thermal voltage given by kT/q (25.9 mV at room temperature)
The parameter n is a function of the device fabrication process and
ranges from 1.0 to 2.5
The parameter μ represents the career mobility
C ox denotes the gate oxide capacitance per unit area
k denotes Boltzman constant = 1.3806 × 10 –23 J/K