92
Network-on-Chip
Other logic
13%
Link
46%
FIFO
41%
Figure 4.15
Component-wise energy consumption with modified router at saturation. Other logic includes
routing logic, arbitration, and control logic.
The component-wise energy consumption of the network with the modified router under uniformly distributed offered load at saturation is shown
in Figure  4.15. It can be observed that the energy consumption of all the
FIFOs is about 41% of the total network energy consumption, whereas all the
links consume only about 46% energy. The combined energy consumption
of all the routing logic, arbiters, and control logic is about 13% of the same.
Thus, even after the architecture modification, FIFOs are the most energyconsuming elements of a router.
The dynamic power reported by Synopsys Prime Power tool consists of
switching power and internal power; the internal power is the summation
of short-circuit power and internal node switching power. As the internal
node switching power is dominated by the transition of clock in any sequential design (Synopsys Prime Power Manual 2006), the capacitances internal to the cell are either charging or discharging with every transition of
clock, and hence consume very high internal power. It can be observed from
Figure 4.14 that the change in the total router energy consumption is not significant with variation in the offered load. The routers consume a significant
amount of energy even at very low traffic, though switching of input data
is low. This appears as the internal power consumption due to free-running
clock dominates over the switching and leakage power. Therefore, to reduce
the internal power, it is essential to stop the free-running clock, when the
network is idle. The implementation of clock gating in FIFO is presented
in Chapter 6. The total energy consumption of a MoT-based network after
clock gating in FIFO with uniformly distributed self-similar traffic is shown
in Figure 4.16. It is noticeable that the link energy consumption exceeds the
router energy consumption after clock gating in FIFO. It can be observed
from Figure 4.17 that the energy consumption of all the FIFOs is 27% of the
total energy, whereas all the inter-router links consume 55% of it. The combined energy consumption of all the routing logic, arbiters, and control logic
is about 18% of the same.