526
Index
Source-drain extensions (SDE), 313
regions, 176, 177f
Source-drain (S/D) pn-junction
capacitance model
drain-body junction diode, 257–258
source-body pn-junction diode,
256–257
Spice Gummel–Poon (SGP) model,
371–372
SP model, 11
features of, 12
Square law model, 157
Square root approximation, 162
of bulk-charge model, 161–163
SRAM, See Static random access
memory (SRAM)
Static random access memory (SRAM),
285, 291
Statistical compact modeling,
297–308, 433
BSIM4 compact model
parameters, 300t
process variability-aware VLSI
circuit design, 297f
Statistical corner models, 296
Statistical model library, 426
STI, See Shallow trench isolation (STI)
Strong inversion, 137
regime, 98, 110
region, 5
Structural confinement (SC), 331
STT, See Surface tunnel transistor (STT)
Substrate current–induced body effect
(SCBE), 201
early voltage due to, 204
Substrate current model, 210–221
Substrate network, modeling, 282–283
Subthreshold
conduction, 167
current, 164
region conduction, 169
slope, 168, 197
slope degradation, 329–330
swing, 353–355
Surface and bulk impact ionization
coefficients in silicon, 213t
Surface mobility, 33
Surface potential (f s ), 5
based compact MOSFET model, 9–12
Surface potential–based, 7, 9–12
Surface potential equation (SPE), 324
Surface roughness (SR), 290, 331–332
Surface states, 90
Surface tunnel transistor (STT), 346
Systematic process variability, 285,
430–433
T
Taylor’s series expansion, 326
Technology CAD (TCAD)
environment, 3
Thermal energy (kT), 25, 36
Thermal G–R process, 40f
Thermal noise, 262–265
advanced thermal noise model,
264–265
basic model, 264
equivalent circuit for thermal noise
of resistor, 263f
models, 263–265
physical mechanism, 262–263
Threshold voltage (V th ), 5, 111, 132, 150
based compact MOSFET model, 7–9
Threshold voltage-based, 7–9
Threshold voltage model, 175–190,
358–359
effect of nonuniform channel doping
on, 176–183
for nonuniform lateral channel
doping profile, 180–183
for nonuniform vertical channel
doping profile, 177–180
small geometry effect on, 183–190
Trans-capacitances, 238
Transition capacitance, 73
Transport current, 227
Transport equations, 49
Traps, 42
Triode region, 157
Tunnel diode, 348
Tunnel FET (TFET)
ambipolar behavior, 345
basic features, 344–346
basic theory, 346–355
design considerations, 355–357
scaling rule, 355
surface tunnel transistor (STT), 346
Index
Source-drain extensions (SDE), 313
regions, 176, 177f
Source-drain (S/D) pn-junction
capacitance model
drain-body junction diode, 257–258
source-body pn-junction diode,
256–257
Spice Gummel–Poon (SGP) model,
371–372
SP model, 11
features of, 12
Square law model, 157
Square root approximation, 162
of bulk-charge model, 161–163
SRAM, See Static random access
memory (SRAM)
Static random access memory (SRAM),
285, 291
Statistical compact modeling,
297–308, 433
BSIM4 compact model
parameters, 300t
process variability-aware VLSI
circuit design, 297f
Statistical corner models, 296
Statistical model library, 426
STI, See Shallow trench isolation (STI)
Strong inversion, 137
regime, 98, 110
region, 5
Structural confinement (SC), 331
STT, See Surface tunnel transistor (STT)
Substrate current–induced body effect
(SCBE), 201
early voltage due to, 204
Substrate current model, 210–221
Substrate network, modeling, 282–283
Subthreshold
conduction, 167
current, 164
region conduction, 169
slope, 168, 197
slope degradation, 329–330
swing, 353–355
Surface and bulk impact ionization
coefficients in silicon, 213t
Surface mobility, 33
Surface potential (f s ), 5
based compact MOSFET model, 9–12
Surface potential–based, 7, 9–12
Surface potential equation (SPE), 324
Surface roughness (SR), 290, 331–332
Surface states, 90
Surface tunnel transistor (STT), 346
Systematic process variability, 285,
430–433
T
Taylor’s series expansion, 326
Technology CAD (TCAD)
environment, 3
Thermal energy (kT), 25, 36
Thermal G–R process, 40f
Thermal noise, 262–265
advanced thermal noise model,
264–265
basic model, 264
equivalent circuit for thermal noise
of resistor, 263f
models, 263–265
physical mechanism, 262–263
Threshold voltage (V th ), 5, 111, 132, 150
based compact MOSFET model, 7–9
Threshold voltage-based, 7–9
Threshold voltage model, 175–190,
358–359
effect of nonuniform channel doping
on, 176–183
for nonuniform lateral channel
doping profile, 180–183
for nonuniform vertical channel
doping profile, 177–180
small geometry effect on, 183–190
Trans-capacitances, 238
Transition capacitance, 73
Transport current, 227
Transport equations, 49
Traps, 42
Triode region, 157
Tunnel diode, 348
Tunnel FET (TFET)
ambipolar behavior, 345
basic features, 344–346
basic theory, 346–355
design considerations, 355–357
scaling rule, 355
surface tunnel transistor (STT), 346