517
Index
Compact device model, general
approach
data collection, 423–427
data fitting to extract parameters,
427–428
generation of library, 429–435
generation of parameter files, 428
model validation, 436
Compact Modeling Council (CMC), 8
found in, 17
Compact TFET models, 357–367
drain current model, 360–367
threshold voltage model, 358–359
Compensated silicon, 28
Complementary metal-oxidesemiconductor (CMOS), 1, 86,
175, 272, 279, 343, 423
critical sources of variability, 287f
estimated threshold voltage
variation, 289f
green IC technology, 343
integrated circuit (IC), 343
International Technology Roadmap for
Semiconductors, 288
IONN versus IONP, 437f, 438–439f
line-edge roughness (LER), 287, 290
line-width roughness (LWR), 287
oxide thickness variation (OTV), 287,
290–291
random discrete doping (RDD),
287–290
technology, 131
Complementary TFET (CTFET)
technology, 356
Conduction band (CB), 20
Conduction electrons, 20
Conductivity effective mass, 26
Core model, 2, 318–328
drain current model, 325–328
electrostatics, 318–324
Correlated carrier and mobility
fluctuation model, 266
Coulomb scattering, 191–192, 331–332
Coupling capacitance, 197
Covalent bond, 20
Crystalline silicon, 19
Current continuity, 140
Current crowding, 332
Current density, 139
Current saturation, 332
Current-voltage (I–V) characteristics,
2, 426
bulk resistance, 71
junction breakdown voltage, 71–72
limitations, 67–70
of nMOSFET device, 158f
relation, 299
temperature dependence of leakage
current, 67
D
DC model for EM1, 377–385
Debye length, 104, 350
Deep depletion, 120
C–V characteristics, 119–121
Deep source-drain (DSD) junctions, 177f
Density of states effective mass, 26
Depletion approximation, 55
of pn-junction, 57f
Depletion approximation, 105–107
Depletion condition, 97
Depletion layer capacitance, 73
Depletion region, 52
DG-nMOSFET device structure
drain current model showing
volume inversion, 328f
drain current model used to simulate
SCE, 330f
drain current model, volume
inversion in lightly doped, 328f
schematic of idealized symmetric
common, 319f
typical symmetric, 316f
DIBL, See Drain-induced barrier
lowering (DIBL)
Diffusion capacitance, 76–77
effect of, 389–392
Diffusion current, 37
Diffusion of carriers, 36–38, 37f
in nonuniformly doped n-type
semiconductor, 38f
Digital Equipment Corporation’s (DEC)
Alpha chip, 9
Diode, 51
current calculation, 66
model at high-level current, 71f
tunnel, 348
Index
Compact device model, general
approach
data collection, 423–427
data fitting to extract parameters,
427–428
generation of library, 429–435
generation of parameter files, 428
model validation, 436
Compact Modeling Council (CMC), 8
found in, 17
Compact TFET models, 357–367
drain current model, 360–367
threshold voltage model, 358–359
Compensated silicon, 28
Complementary metal-oxidesemiconductor (CMOS), 1, 86,
175, 272, 279, 343, 423
critical sources of variability, 287f
estimated threshold voltage
variation, 289f
green IC technology, 343
integrated circuit (IC), 343
International Technology Roadmap for
Semiconductors, 288
IONN versus IONP, 437f, 438–439f
line-edge roughness (LER), 287, 290
line-width roughness (LWR), 287
oxide thickness variation (OTV), 287,
290–291
random discrete doping (RDD),
287–290
technology, 131
Complementary TFET (CTFET)
technology, 356
Conduction band (CB), 20
Conduction electrons, 20
Conductivity effective mass, 26
Core model, 2, 318–328
drain current model, 325–328
electrostatics, 318–324
Correlated carrier and mobility
fluctuation model, 266
Coulomb scattering, 191–192, 331–332
Coupling capacitance, 197
Covalent bond, 20
Crystalline silicon, 19
Current continuity, 140
Current crowding, 332
Current density, 139
Current saturation, 332
Current-voltage (I–V) characteristics,
2, 426
bulk resistance, 71
junction breakdown voltage, 71–72
limitations, 67–70
of nMOSFET device, 158f
relation, 299
temperature dependence of leakage
current, 67
D
DC model for EM1, 377–385
Debye length, 104, 350
Deep depletion, 120
C–V characteristics, 119–121
Deep source-drain (DSD) junctions, 177f
Density of states effective mass, 26
Depletion approximation, 55
of pn-junction, 57f
Depletion approximation, 105–107
Depletion condition, 97
Depletion layer capacitance, 73
Depletion region, 52
DG-nMOSFET device structure
drain current model showing
volume inversion, 328f
drain current model used to simulate
SCE, 330f
drain current model, volume
inversion in lightly doped, 328f
schematic of idealized symmetric
common, 319f
typical symmetric, 316f
DIBL, See Drain-induced barrier
lowering (DIBL)
Diffusion capacitance, 76–77
effect of, 389–392
Diffusion current, 37
Diffusion of carriers, 36–38, 37f
in nonuniformly doped n-type
semiconductor, 38f
Digital Equipment Corporation’s (DEC)
Alpha chip, 9
Diode, 51
current calculation, 66
model at high-level current, 71f
tunnel, 348