493
References
6. M.F. Sevat, “On the channel charge division in MOSFET modeling,” in IEEE
International Conference on Computer-Aided Design, Digest of Technical Papers,
pp. 208–210, 1987.
7. G.W. Taylor, W. Fichtner, and J.G. Simmons, “A description of MOS intermodal
capacitances for transient simulation,” IEEE Transactions on Computer-Aided
Design, vol. 1, no. 4, pp. 150–156, 1982.
8. P. Yang, B.D. Epler, and P. Chatterjee, “An investigation of the charge conversation problem for MOSFET circuit simulation,” IEEE Journal of Solid-State Circuits,
vol. 18, no. 1, pp. 128–138, 1983.
9. K.Y. Tong, “AC model for MOS transistors from transient-current computations,”
IEE Proceedings on Solid-State and Electron Devices, vol. 130, no. 1, pp. 33–36, 1983.
10. L.W. Nagel, SPICE2—A Computer Program to Simulate Semiconductor Circuits,
Memo ERL-M250, Electronic Research Laboratory, University of California,
Berkeley, CA, May 1975.
11. M.A. Cirit, “The Meyer model revisited: Why is charge not conserved?,” IEEE
Transactions on Computer-Aided Design, vol. 8, no. 10, pp. 1033–1037, 1989.
12. K.A. Sakallah, Y.-T. Yen, and S.S. Greenberg, “The Meyer model revisited:
Explaining and correcting the charge non-conservation problem,” in IEEE
International Conference on Computer-Aided Design, Digest of Technical Papers,
pp. 204–207, IEEE, 1987.
13. T. Smedes and F.M. Klaassen, “Effects of the lightly doped drain configuration
on capacitance characteristics of submicron MOSFETs,” in IEEE International
Electron Devices Meeting Technical Digest, pp. 197–200, 1990.
14. K.A. Sakallah, Y.-T. Yen, and S.S. Greenberg, “A first order charge conserving
model MOS capacitor model,” IEEE Transactions on Computer-Aided Design, vol. 9,
no. 1, pp. 99–108, 1990.
15. B.J. Sheu, D.L. Scharfetter, C. Hu, and D.O. Pederson, “A compact IGFET charge
model,” IEEE Transactions on Circuits and Systems, vol. 31, no. 8, pp. 745–748, 1984.
16. D.E. Ward, “Charge-base modeling of capacitances in MOS transistors,”
Stanford Electronics Laboratory Technical Report, G201–11, Stanford University,
Stanford, CA, 1981.
17. J.G. Fossum, H. Jeong, and S. Veeraraghavan, “Significance of the channelcharge partition in the transient MOSFET model,” IEEE Transactions on Electron
Devices, vol. 33, no. 10, pp. 1621–1623, 1986.
18. P. Yang, “Capacitance modeling for MOSFETs,” in Circuit Analysis, Simulation
and Design, A.E. Ruehli, ed., Elsevier, Amsterdam, the Netherlands, pp. 107–130,
1986.
19. B.J. Sheu, W.-J. Hsu, and P.K. Ko, “An MOS transistor charge model for VLSI
design,” IEEE Transactions on Computer-Aided Design, vol. 7, no. 4, pp. 520–527,
1988.
20. R. Shrivastava and K. Fitzpatrick, “A simple model for the overlap capacitance
of a VLSI MOS device,” IEEE Transactions on Electron Devices, vol. 29, no. 12,
pp. 1870–1875, 1982.
21. N. Paydavosi, T.H. Morshed, D.D. Lu, W. Yang, M.V. Dunga, X. Xi, J. He, W. Liu,
K. cao, X. Jin, J.J. Ou, M. Chan, A.M. Niknejad, and C. Hu, “BSIM4v4.8.0 MOSFET
Model User’s Manual,” University of California, Berkeley, CA, 2013.
22. Y. Cheng and C. Hu, MOSFET Modeling and BSIM3 User’s Guide, Kluwer
Academic Publishers, Boston, MA, 1999.
References
6. M.F. Sevat, “On the channel charge division in MOSFET modeling,” in IEEE
International Conference on Computer-Aided Design, Digest of Technical Papers,
pp. 208–210, 1987.
7. G.W. Taylor, W. Fichtner, and J.G. Simmons, “A description of MOS intermodal
capacitances for transient simulation,” IEEE Transactions on Computer-Aided
Design, vol. 1, no. 4, pp. 150–156, 1982.
8. P. Yang, B.D. Epler, and P. Chatterjee, “An investigation of the charge conversation problem for MOSFET circuit simulation,” IEEE Journal of Solid-State Circuits,
vol. 18, no. 1, pp. 128–138, 1983.
9. K.Y. Tong, “AC model for MOS transistors from transient-current computations,”
IEE Proceedings on Solid-State and Electron Devices, vol. 130, no. 1, pp. 33–36, 1983.
10. L.W. Nagel, SPICE2—A Computer Program to Simulate Semiconductor Circuits,
Memo ERL-M250, Electronic Research Laboratory, University of California,
Berkeley, CA, May 1975.
11. M.A. Cirit, “The Meyer model revisited: Why is charge not conserved?,” IEEE
Transactions on Computer-Aided Design, vol. 8, no. 10, pp. 1033–1037, 1989.
12. K.A. Sakallah, Y.-T. Yen, and S.S. Greenberg, “The Meyer model revisited:
Explaining and correcting the charge non-conservation problem,” in IEEE
International Conference on Computer-Aided Design, Digest of Technical Papers,
pp. 204–207, IEEE, 1987.
13. T. Smedes and F.M. Klaassen, “Effects of the lightly doped drain configuration
on capacitance characteristics of submicron MOSFETs,” in IEEE International
Electron Devices Meeting Technical Digest, pp. 197–200, 1990.
14. K.A. Sakallah, Y.-T. Yen, and S.S. Greenberg, “A first order charge conserving
model MOS capacitor model,” IEEE Transactions on Computer-Aided Design, vol. 9,
no. 1, pp. 99–108, 1990.
15. B.J. Sheu, D.L. Scharfetter, C. Hu, and D.O. Pederson, “A compact IGFET charge
model,” IEEE Transactions on Circuits and Systems, vol. 31, no. 8, pp. 745–748, 1984.
16. D.E. Ward, “Charge-base modeling of capacitances in MOS transistors,”
Stanford Electronics Laboratory Technical Report, G201–11, Stanford University,
Stanford, CA, 1981.
17. J.G. Fossum, H. Jeong, and S. Veeraraghavan, “Significance of the channelcharge partition in the transient MOSFET model,” IEEE Transactions on Electron
Devices, vol. 33, no. 10, pp. 1621–1623, 1986.
18. P. Yang, “Capacitance modeling for MOSFETs,” in Circuit Analysis, Simulation
and Design, A.E. Ruehli, ed., Elsevier, Amsterdam, the Netherlands, pp. 107–130,
1986.
19. B.J. Sheu, W.-J. Hsu, and P.K. Ko, “An MOS transistor charge model for VLSI
design,” IEEE Transactions on Computer-Aided Design, vol. 7, no. 4, pp. 520–527,
1988.
20. R. Shrivastava and K. Fitzpatrick, “A simple model for the overlap capacitance
of a VLSI MOS device,” IEEE Transactions on Electron Devices, vol. 29, no. 12,
pp. 1870–1875, 1982.
21. N. Paydavosi, T.H. Morshed, D.D. Lu, W. Yang, M.V. Dunga, X. Xi, J. He, W. Liu,
K. cao, X. Jin, J.J. Ou, M. Chan, A.M. Niknejad, and C. Hu, “BSIM4v4.8.0 MOSFET
Model User’s Manual,” University of California, Berkeley, CA, 2013.
22. Y. Cheng and C. Hu, MOSFET Modeling and BSIM3 User’s Guide, Kluwer
Academic Publishers, Boston, MA, 1999.