488
References
5. J.R. Brews, “A charge sheet model of the MOSFET,” Solid-State Electronics, vol. 21,
no. 2, pp. 345–355, 1978.
6. S.K. Saha, “Modeling process variability in scaled CMOS technology,” IEEE
Design & Test of Computers, vol. 27, no. 2, pp. 8–16, 2010.
7. S. Saha, “Device characteristics of sub-20-nm silicon nanotransistors,” in Proceedings of the SPIE Conference on Design and Process Integration for Microelectronic
Manufacturing, vol. 5042, pp. 172–179, 2003.
8. S.K. Saha, “Transistors having optimized source-drain structures and methods
for making the same,” US Patent 6344405, February 5, 2002.
9. S. Saha, “Scaling considerations for high performance 25  nm metal-oxidesemiconductor field-effect transistors,” Journal of Vacuum Science & Technology B,
vol. 19, no. 6, pp. 2240–2246, 2001.
10. S. Saha, “Design considerations for 25 nm MOSFET devices,” Solid-State Electronics, vol. 45, no. 10, pp. 1851–1857, 2001.
11. S.K. Saha, “Drain profile engineering for MOSFET devices with channel
lengths below 100 nm,” in Proceedings of the SPIE Conference on Microelectronic
Device Technology, vol. 3881, pp. 195–204, 1999.
12. Y. Cheng and C. Hu, MOSFET Modeling and BSIM3 User’s Guide, Kluwer
Academic Publishers, Boston, MA, 1999.
13. N.D. Arora, MOSFET Models for VLSI Circuit Simulation: Theory and Practice,
Springer-Verlag, Wien, Austria, 1993.
14. Taurus MEDICI Manuals, Synopsys, Inc., Mountain View, CA, 2007.
15. T. Binder, K. Dragosits, T. Grasser, R. Klima, M. Knaipp, H. Kosins, R. Mlekus
et al., MINIMOS-NT User’s Guide: Institut für Mikroelektronik, Technical University,
Vienna, Austria, August 2013.
16. Sentaurus TCAD Manuals, Synopsys, Inc., Mountain View, CA, 2012.
17. Atlas User’s Manual: Device Simulation Software, Silvaco, Inc., Santa Clara, CA, 2013.
18. J.R. Brews, “Physics of MOS transistor,” in Silicon Integrated Circuits, Part A, D.
Kahng (ed.). Applied Solid State Science Series, Academic Press, New York,
1981.
19. P.P. Guebels and F. Van de Wiele, “A small geometry MOSFET models for CAD
applications, Solid-State Electronics,” vol. 26, no. 4, pp. 267–273, 1983.
20. G. Baccarani, M. Rudan, and G. Spadini, “Analytical i.g.f.e.t model including
drift and diffusion currents,” IEEE Journal on Solid-State and Electron Devices,
vol. 2, no. 2, pp. 62–68, 1987.
21. F. Van de Wiele, “A long channel MOSFET model,” Solid-State Electronics, vol. 22,
no. 12, pp. 991–997, 1979.
22. C. Turchetti and G. Masetti, “A CAD-oriented analytical MOSFET model for
high–accuracy applications,” IEEE Transactions on Computer-Aided Design, vol. 3,
no. 2, pp. 117–122, 1984.
23. A.M. Ostrowsky, Solutions of Equations and Systems of Equations, Academic Press,
New York, 1973.
24. Y.P. Tsividis, “Moderate inversion in MOS devices,” Solid-State Electronics, vol. 26,
no. 11, pp. 1099–1104, 1982.
25. Y.P. Tsividis, Operation and Modeling of the MOS Transistor, 2nd edition, Oxford
University Press, New York, 1999.
26. M. Miura-Mattausch, H.J. Mattausch, and T. Ezaki, The Physics and Modeling of
MOSFETS: Surface-Potential Model HiSIM, World Scientific, Singapore, 2008.
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