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Compact Model Library for Circuit Simulation
12.4 Summary
A brief overview of generating statistical compact MOSFET model library
and its usage is described. The generation of compact model library involves
selection of device structures and device characteristics to capture the realdevice effects in describing the device performance in IC chips. The data
acquisition and data fitting to generate the model parameters and parameterization of the process variability-sensitive model parameters are critical for
statistical compact model. It is shown that a comprehensive simple statistical
model library can be developed and used by implementing different switches
or flags to turn on or off the relevant models for circuit CAD. The example
model files are provided to expose readers to the statistical models and model
development from a minimum set of devices and device characteristics.
7.50E−04
3.5E−04
4.0E−04
4.5E−04
5.0E−04
5.5E−04
8.50E−04
FF
TT
SF
FS
SS
9.50E−04
IONN (A/μm)
(b)
IONP (A/μm)
1.15E−03
1.05E−03
MC (global + local)
Statistical corners
MC (local), globalpmean = 3, globalpmean = 3
FIGURE 12.7 (Continued)
Simulated IONN versus IONP of a typical CMOS technology obtained by HSPICE circuit CAD
using a model card similar to ex1mod0p1.l: (b) total MC distribution around the TT values and
MC mismatch distribution at FF corner.
TABLE 12.5
Comparison of Nanoscale MOSFET Circuit Simulation Results using Different
Methods for Process Variability Modeling
Simulation
Method
Simulation
Results
Model Set
Model
Extraction
Simulation
Time
Worst-case fixed
corner
Pass/Fail:
pessimistic
Discrete; artificial
Easy
Fast to moderate
Statistical corner
Pass/Fail: realistic Discrete wafer data
Complex
Moderate
Monte Carlo
Yield: mismatch
Distribution
Complex
Long
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