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Compact Models for Integrated Circuit Design
Sample Model Cards
1. Compact Model of an Advanced CMOS Technology
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* Example1: 20 nm CMOS technology node MOS Hspice model library
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* Version:
ex1mod0p1.l *** January 21, 2015 ***
* MODEL:
BSIM4 ( V4.5 )
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* Model Information
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* This Rev0 version of sample SPICE model is based on two* dimensional numerical device simulation
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*.LIB INTERNAL
*-----------------------------------------------------------------------------------------* History of model updates
*-----------------------------------------------------------------------------------------* Jan 20, 2015: model created from TCAD-based data – only
* selected parameters are shown in the model card to illustrate
* the basic procedure for the generation of compact model
* library
*-----------------------------------------------------------------------------------------*.ENDL INTERNAL
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* Begin header
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* Usage:
*
* Hspice Version: 2007.03, 2008.03, 2009.03
*
* Library includes standard-Vth (svt) corner libraries:
* .lib ‘ex1mod0p1.l’ TT
* .lib ‘ex1mod0p1.l’ FF
* .lib ‘ex1mod0p1.l’ SS
* .lib ‘ex1mod0p1.l’ SF
* .lib ‘ex1mod0p1.l’ FS
* .lib ‘ex1mod0p1.l’ MC
*
* .options scale=1
* XXX = svt
* Transistor sub-circuits
* p4_XXX : PMOS XXX vt Ldrawn = 0.026-u, Wdrawn = 1-u
*
x0 d g s b
*
+p4_svt w=w l=l
$$ REQUIRED
*
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