360
Compact Models for Integrated Circuit Design
10.5.2 Drain Current Model
In order to develop a TFET I ds model, we consider a TFET as a combination of an ideal tunnel diode in series with a drain-MOSFET device as shown
in Figure 10.8. Therefore, the interband tunneling and drift-diffusion transport
mechanisms must be considered in modeling I ds for TFETs. Numerical simulation results show that the relatively large channel resistance due to the
drift-diffusion causes additional potential drop and stronger lateral electric
field in the channel, resulting in mobility (μ) and I on degradation [107]. Thus,
the modeling of channel transport in TFETs is important along with the
interband tunneling. However, since the interband tunneling and channel
transport mechanisms are coupled, the modeling of TFETs with two coupled
transports increases the complexity of device modeling. Therefore, for the
simplicity of compact TFET modeling, two separate I ds models can be developed: (1) an ideal I ds equation considering only the tunneling probability of
the junction without the channel transport and (2) a second I ds equation considering only the drift-diffusion transport in the channel-MOSFET. However,
only the ideal current model can be accurately used for low-current drivability TFETs, whereas for high-current drivability devices, both the ideal and
the channel transport I ds equations must be used for accurate device analysis
in circuit CAD.
(a)
(b)
V s
V d
V int
V g
L
Gate metal
Gate metal
Gate oxide
Gate oxide
III
II
I
i-Silicon
(0,0)
t ox
t ox
t si
V g
V g
V d
V s
p+
Source
n+
Drain
−L 1 L 2
x
y
FIGURE 10.8
Schematics of a DG-nTFET for drain current modeling: (a) device structure with channel division
in regions I, II, and III for current transports and (b) equivalent circuit representation of an
ideal tunnel diode. L 1 , L 2 are the length of the region I and II, respectively; V int is the internal
node; L is the channel length of the device; V int = V ds for ideal current model and V int < V ds for
channel transport.
Compact Models for Integrated Circuit Design
10.5.2 Drain Current Model
In order to develop a TFET I ds model, we consider a TFET as a combination of an ideal tunnel diode in series with a drain-MOSFET device as shown
in Figure 10.8. Therefore, the interband tunneling and drift-diffusion transport
mechanisms must be considered in modeling I ds for TFETs. Numerical simulation results show that the relatively large channel resistance due to the
drift-diffusion causes additional potential drop and stronger lateral electric
field in the channel, resulting in mobility (μ) and I on degradation [107]. Thus,
the modeling of channel transport in TFETs is important along with the
interband tunneling. However, since the interband tunneling and channel
transport mechanisms are coupled, the modeling of TFETs with two coupled
transports increases the complexity of device modeling. Therefore, for the
simplicity of compact TFET modeling, two separate I ds models can be developed: (1) an ideal I ds equation considering only the tunneling probability of
the junction without the channel transport and (2) a second I ds equation considering only the drift-diffusion transport in the channel-MOSFET. However,
only the ideal current model can be accurately used for low-current drivability TFETs, whereas for high-current drivability devices, both the ideal and
the channel transport I ds equations must be used for accurate device analysis
in circuit CAD.
(a)
(b)
V s
V d
V int
V g
L
Gate metal
Gate metal
Gate oxide
Gate oxide
III
II
I
i-Silicon
(0,0)
t ox
t ox
t si
V g
V g
V d
V s
p+
Source
n+
Drain
−L 1 L 2
x
y
FIGURE 10.8
Schematics of a DG-nTFET for drain current modeling: (a) device structure with channel division
in regions I, II, and III for current transports and (b) equivalent circuit representation of an
ideal tunnel diode. L 1 , L 2 are the length of the region I and II, respectively; V int is the internal
node; L is the channel length of the device; V int = V ds for ideal current model and V int < V ds for
channel transport.