329
Compact Models for Ultrathin Body FETs
9.3.2.1 Short Channel Effects
SCEs originate from 2D electrostatics where the drain significantly affects
the potential barrier at the source due to its close proximity to source region.
SCEs degrade the device performance through V th roll-off and S degradation.
There are several approaches to model SCEs [66–70]. However, the approach
assuming a parabolic potential function perpendicular to the silicon-insulator
interface to solve the 2D Poisson’s equation is shown to maintain a balance
between the model accuracy and model computation time [68,69].
V th roll-off: In order to model V th roll-off in DG-FETs, 2D Poisson’s equation is solved in the x direction into the body and in the y direction along
the length of the channel, assuming that the inversion charge is negligible
and the electric field E x is independent of y whereas the electric field E y is
independent of x. Then assuming a parabolic potential distribution along
the x direction, the minimum potential at the center of the channel f 0 (y) is
determined [70]. Then the minimum potential f c,min [61] is expressed in terms
of the terminal voltages V gs and V ds , L, and the characteristic field-penetration
length λ, and is defined as
λ
ε
ε
ε
ε
≡
+
K
K
K t
K t
t t
si
ox
ox
si
si
ox
fin ox
0
0
0
0
2
1 4
(9.47)
λ is known as the scale length that defines the extent of penetration of the
electric field from the drain into the body as function of physical parameters
T ox and t fin and, therefore, the amount of SCE in a transistor. The change in
V th is then defined as
∆V L V
L V V
th
ds
L
gs
ds
, ,
lim
, , ,
,
λ
φ
λ
(
)≡
(
)
→∞
c min
(9.48)
The term ΔV th (L, λ, V ds ) is further enhanced with more parameters for simplicity of the parameter extraction procedure and to improve modeling accuracy [71]. In BSIM-CMG model, ΔV th is subtracted from V fb [72–74].
Figure 9.8 shows the dependence of ΔV th on the gate oxide thickness and
silicon body thickness. As the oxide thickness and body thickness decrease,
the gate control on the body increases, thus suppressing SCE as expected [64].
Subthreshold slope degradation: The subthreshold swing, S, in a planar
MOSFET is defined as (Equation 4.124)
S
d
I
dV
v
C
C
C
C
C
ds
gs
kT
d
ox
IT
ox
DSC
≡
( )
≅ ( )
+
+
+
−
log
ln
1
10
1
C C ox
(9.49)
where:
C d is the depletion capacitance associated with the depletion region
C IT is the capacitance due to interface states
Compact Models for Ultrathin Body FETs
9.3.2.1 Short Channel Effects
SCEs originate from 2D electrostatics where the drain significantly affects
the potential barrier at the source due to its close proximity to source region.
SCEs degrade the device performance through V th roll-off and S degradation.
There are several approaches to model SCEs [66–70]. However, the approach
assuming a parabolic potential function perpendicular to the silicon-insulator
interface to solve the 2D Poisson’s equation is shown to maintain a balance
between the model accuracy and model computation time [68,69].
V th roll-off: In order to model V th roll-off in DG-FETs, 2D Poisson’s equation is solved in the x direction into the body and in the y direction along
the length of the channel, assuming that the inversion charge is negligible
and the electric field E x is independent of y whereas the electric field E y is
independent of x. Then assuming a parabolic potential distribution along
the x direction, the minimum potential at the center of the channel f 0 (y) is
determined [70]. Then the minimum potential f c,min [61] is expressed in terms
of the terminal voltages V gs and V ds , L, and the characteristic field-penetration
length λ, and is defined as
λ
ε
ε
ε
ε
≡
+
K
K
K t
K t
t t
si
ox
ox
si
si
ox
fin ox
0
0
0
0
2
1 4
(9.47)
λ is known as the scale length that defines the extent of penetration of the
electric field from the drain into the body as function of physical parameters
T ox and t fin and, therefore, the amount of SCE in a transistor. The change in
V th is then defined as
∆V L V
L V V
th
ds
L
gs
ds
, ,
lim
, , ,
,
λ
φ
λ
(
)≡
(
)
→∞
c min
(9.48)
The term ΔV th (L, λ, V ds ) is further enhanced with more parameters for simplicity of the parameter extraction procedure and to improve modeling accuracy [71]. In BSIM-CMG model, ΔV th is subtracted from V fb [72–74].
Figure 9.8 shows the dependence of ΔV th on the gate oxide thickness and
silicon body thickness. As the oxide thickness and body thickness decrease,
the gate control on the body increases, thus suppressing SCE as expected [64].
Subthreshold slope degradation: The subthreshold swing, S, in a planar
MOSFET is defined as (Equation 4.124)
S
d
I
dV
v
C
C
C
C
C
ds
gs
kT
d
ox
IT
ox
DSC
≡
( )
≅ ( )
+
+
+
−
log
ln
1
10
1
C C ox
(9.49)
where:
C d is the depletion capacitance associated with the depletion region
C IT is the capacitance due to interface states