286
Compact Models for Integrated Circuit Design
variability [9,14–21]. In this chapter, we will present different approaches to
develop statistical compact MOSFET device models to account for the frontend process variability in VLSI circuit design.
8.2 Sources of Front-End Process Variability
The intrinsic sources of variability in VLSI device performance arise from
the random variability of fabrication-processing steps [1,9–11]. Typically, the
intrinsic process variability is grouped as systematic and stochastic or random
as shown in Figure 8.1.
8.2.1 Systematic or Global Process Variability
Systematic variation in IC (integrated circuit) device and chip performance is
caused by inherent random character of IC-processing steps. The systematic
component is defined as the global or inter-die process variability [1,9–13].
The global process variability causes die-to-die, wafer-to-wafer, or lot-tolot systematic parametric fluctuations between identical devices [1,9–13].
Global variability causes a shift in the mean value of the sensitive design
parameters, including the channel length (L), channel width (W), gate oxide
thickness (T ox ), resistivity, doping concentration, and body effect as shown in
Figure 8.2. Systematic differences may lead to longer channel length transistors than the nominal devices, causing them to switch more slowly due to
reduced drive current, resulting in slower ICs with lower leakage current.
On the other hand, the shorter (than the nominal) channel length devices
would lead to faster die easily meeting clock-frequency specifications; however, these devices may exhibit excessive leakage current and fail leakage
Random
variation
Systematic
variation
FIGURE 8.1
Types of process variability: random variation of a parameter around its mean value and systematic variation of the mean value of a parameter.
Compact Models for Integrated Circuit Design
variability [9,14–21]. In this chapter, we will present different approaches to
develop statistical compact MOSFET device models to account for the frontend process variability in VLSI circuit design.
8.2 Sources of Front-End Process Variability
The intrinsic sources of variability in VLSI device performance arise from
the random variability of fabrication-processing steps [1,9–11]. Typically, the
intrinsic process variability is grouped as systematic and stochastic or random
as shown in Figure 8.1.
8.2.1 Systematic or Global Process Variability
Systematic variation in IC (integrated circuit) device and chip performance is
caused by inherent random character of IC-processing steps. The systematic
component is defined as the global or inter-die process variability [1,9–13].
The global process variability causes die-to-die, wafer-to-wafer, or lot-tolot systematic parametric fluctuations between identical devices [1,9–13].
Global variability causes a shift in the mean value of the sensitive design
parameters, including the channel length (L), channel width (W), gate oxide
thickness (T ox ), resistivity, doping concentration, and body effect as shown in
Figure 8.2. Systematic differences may lead to longer channel length transistors than the nominal devices, causing them to switch more slowly due to
reduced drive current, resulting in slower ICs with lower leakage current.
On the other hand, the shorter (than the nominal) channel length devices
would lead to faster die easily meeting clock-frequency specifications; however, these devices may exhibit excessive leakage current and fail leakage
Random
variation
Systematic
variation
FIGURE 8.1
Types of process variability: random variation of a parameter around its mean value and systematic variation of the mean value of a parameter.