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Compact Models for Integrated Circuit Design
7.2.2.2 Thermal Noise Model
Basic Model: The thermal noise model originally implemented in SPICE2
(Simulation Program with Integrated Circuit Emphasis) [12] is given by
Si f
kT g
d
m
( ) =
8
3
(7.3)
where:
g m is the gate transconductance of the device
Equation 7.3 is found to be inadequate in the linear region, especially when
V ds  = 0, where the transconductance is zero so that the calculated noise density
is zero. However, in reality, the noise power density is not zero. To resolve this
problem, the SPICE2 noise model is modified to the following form:
Si f
kT g
g
g
d
m
ds
mb
( ) =
+
+
(
)
8
3
(7.4)
where:
g ds and g mb are the output conductance and the bulk transconductance,
respectively
Advanced Thermal Noise Model: An advanced thermal noise model is used in
the industry standard compact modeling tools. We will derive the thermal
noise model following the steps described by Tsividis and McAndrew [4]. It
is well known that PSD of the noise voltage, generated across a resistor of
value R, is 4kTR [2]. If a small element in the MOSFET channel has a resistance, ΔR, the noise voltage power of this element is
∆
∆ ∆
v
kT R f
t
( ) =
2
4
(7.5)
Assuming the length of the small element of the channel is Δy, then ΔR is
∆
∆
R
y
W Q
eff i
= µ
(7.6)
where:
W eff is the effective channel width
μ is the electron mobility
Q i is the channel charge per unit area
Substituting Equation 7.6 into Equation 7.5 gives
∆
∆ ∆
v
kT f y
W Q
t
eff i
( ) =
2
4
µ
(7.7)