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Digital Electronics
comprises one master (typically a moderately powerful microcontroller) and up to 16 slaves (less
powerful, cheaper microcontrollers or ASICs). It does not offer a collision detection feature and
therefore all messages are initiated by the master with at the most one slave replying to a given message
identifier. Multiple such LIN networks may all be linked to a CAN upper layer network through their
respective masters.
Example 14.1
A certain microcontroller has an on-chip 16-bit counter/timer system. It is used to measure the width
of an input pulse. The microcontroller has been programmed to measure the time of occurrence of
rising and falling edges of an input pulse on a certain I/O pin. If the microcontroller uses an 8 MHz
clock and the count values observed at the time of occurrence of rising and falling edges of the input
pulse are 001F and 00F1 (in hex), determine the pulse width as measured by the microcontroller.
Solution
• Since the microcontroller uses a 16-bit counter, it counts from 0000 to FFFF (in hex) or 0 to 65536
in decimal.
• The rising edge of the input pulse occurs at 001F, the decimal equivalent of which is 31.
• The falling edge occurs at 00F1, the decimal equivalent of which is 241.
• Therefore, the input pulse width accounts for 241 − 31 = 210 clock cycles.
• The clock signal time period = 1/8 = 0.125 s.
• Therefore, the time period corresponding to 210 cycles = 210 × 0.125 = 26.25 s.
• The pulse width measured by the microcontroller = 26.25 s.
Example 14.2
It is desired to design a microcontroller-based periodic signal generator with minimum and maximum
time period specifications of 125 ns and 100 ms. What should the system clock frequency be?
Solution
• The minimum time period that can be generated by the microcontroller equals the time period
corresponding to one clock cycle.
• Therefore, one clock cycle time period = 125 ns.
• The clock frequency = 1/125 GHz = 1000/125 MHz = 8 MHz.
14.3 Microcontroller Architecture
Microcontroller architecture may be defined in several ways. These include architecture used by the
processor to access memory, architecture used for mapping special-function registers into memory
space and the processor architecture itself.
14.3.1 Architecture to Access Memory
There are two fundamental architectures used by the processing units to access memory, namely Von
Neumann architecture and Harvard architecture.
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