Counters and Registers
469
Table 11.16 (continued).
Type
Function
Logic
number
family
4518 B
Dual four-bit decade counter
CMOS
4520B
Dual four-bit binary counter
CMOS
4522 B
Four-bit BCD programmable divide-by-N counter
CMOS
4722 B
Programmable counter/timer
CMOS
4731 B
Quad 64-bit static shift register
CMOS
MC 10136
Universal hexadecimal counter
ECL
MC 10137
Universal decade counter
ECL
MC 10141
Four-bit universal shift register
ECL
MC 10154
Binary counter (four-bit)
ECL
MC 10178
Four-bit binary counter
ECL
8. What do you understand when the PRESET, CLEAR, UP/DOWN, master reset and parallel load
functions of a counter are designated as PR, CLR, U/D, MR and PL respectively?
9. What are counters with arbitrary count sequences? Briefly describe the procedure for designing a
counter with a given arbitrary count sequence.
10. Give at least one IC type number for:
(a) a four-bit binary ripple counter;
(b) a four-bit synchronous counter;
(c) an eight-bit serial-in serial-out shift register;
(d) a bidirectional universal shift register.
Problems
1. For the multistage counter arrangement of Fig.11.54, determine the frequency of the output signal.
125 Hz
4-bit
Binary
Ripple
Counter
5-Bit
Ring
Counter
BCD
Counter
5-bit
Shift
Counter
1MHz
f 0
Figure 11.54 Problem 1.
2. A four-bit binary UP counter is initially in the 0000 state. Then the clock pulses are applied. Some
time later the clock pulses are removed, and at that the counter is observed to be in the 0011 state.
What is the minimum number of clock pulses that could possibly have occurred?
3
3. An eight-bit binary ripple UP counter with a modulus of 256 is holding the count 01111111. What
will be the count after 135 clock pulses be?
00000110