426
Digital Electronics
Q 0
J
K
1
Clk
Clock
Input
FF0
Q 1
J
K
Clk FF1
Q 2
J
K
Clk FF2
Up/Down
Control
Figure 11.11 Three-bit UP/DOWN counter with a common clock input.
control is logic ‘0’. In this case the clock input of each flip-flop other than the LSB flip-flop is fed
from the normal output of the immediately preceding flip-flop. The counter counts downwards when
the UP control input is logic ‘0’ and DOWN control is logic ‘1’. In this case, the clock input of
each flip-flop other than the LSB flip-flop is fed from the complemented output of the immediately
preceding flip-flop. Figure 11.11 shows another possible configuration for a three-bit binary ripple
UP/DOWN counter. It has a common control input. When this input is in logic ‘1’ state the counter
counts downwards, and when it is in logic ‘0’ state it counts upwards.
11.7 Decade and BCD Counters
A decade counter is one that goes through 10 unique output combinations and then resets as the
clock proceeds further. Since it is an MOD-10 counter, it can be constructed with a minimum of four
flip-flops. A four-bit counter would have 16 states. By skipping any of the six states by using some
kind of feedback or some kind of additional logic, we can convert a normal four-bit binary counter into
a decade counter. A decade counter does not necessarily count from 0000 to 1001. It could even count
as 0000, 0001, 0010, 0101, 0110, 1001, 1010, 1100, 1101, 1111, 0000, In this count sequence, we
have skipped 0011, 0100, 0111, 1000, 1011 and 1110.
A BCD counter is a special case of a decade counter in which the counter counts from 0000
to 1001 and then resets. The output weights of flip-flops in these counters are in accordance with
8421-code. For instance, at the end of the seventh clock pulse, the counter output will be 0111, which
is the binary equivalent of decimal 7. In other words, different counter states in this counter are
binary equivalents of the decimal numbers 0 to 9. These are different from other decade counters
that provide the same count by using some kind of forced feedback to skip six of the natural binary
counts.
11.8 Presettable Counters
Presettable counters are those that can be preset to any starting count either asynchronously
(independently of the clock signal) or synchronously (with the active transition of the clock signal).
The presetting operation is achieved with the help of PRESET and CLEAR (or MASTER RESET)
inputs available on the flip-flops. The presetting operation is also known as the ‘preloading’ or simply
the ‘loading’ operation.
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