Programmable Logic Devices
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LB
LB
LB
LB
LB
LB
LB
LB
I/O
LB : Logic B lock
Programmable Interconnect Matrix
I/O
Figure 9.24 CPLD architecture.
I/O
Control
Block
Macrocell
Product term
Sharing
Programmable
Interconnect
To
other LBs
from
I/O pins
Figure 9.25 Logic block structure.
OR gate can also be fed with some additional product terms generated within other macrocells of the
same logic block. For example, a logic block in the case of the MAX-7000 series of CPLDs from
Altera offers this product-term flexibility, where the OR gate of each macrocell can have up to 15