Programmable Logic Devices
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9.2.6 Field-Programmable Gate Array
A field-programmable gate array (FPGA) uses an array of logic blocks, which can be configured by
the user. The term ‘field-programmable’ here signifies that the device is programmable outside the
factory where it is manufactured. The internal architecture of an FPGA device has three main parts,
namely the array of logic blocks, the programmable interconnects and the I/O blocks. Figure 9.7 shows
the architecture of a typical FPGA. Each of the I/O blocks provides an individually selectable input,
output or bidirectional access to one of the general-purpose I/O pins on the FPGA package. The logic
blocks in an FPGA are no more complex than a couple of logic gates or a look-up table feeding a
flip-flop. The programmable interconnects connect logic blocks to logic blocks and also I/O blocks to
logic blocks.
FPGAs offer a much higher logic density and much larger performance features compared with
CPLDs. Some of the contemporary FPGA devices offer a logic complexity equivalent to that of
eight million system gates. Also, these devices offer features such as built-in hard-wired processors,
Programmable
Interconnect
I/O
Blocks
Logic
Blocks
Figure 9.7 FPGA architecture.