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Digital Electronics
large memory, clock management systems and support for many of the contemporary device-to-device
signalling technologies. FPGAs find extensive use in a variety of applications, which include data
processing and storage, digital signal processing, instrumentation and telecommunications.
FPGAs are also programmed like CPLDs after they are soldered onto the PC board. In the case of
FPGAs, the programmed configuration is usually volatile and therefore needs to be reloaded whenever
power is applied or a different functionality is required.
9.3 Programmable ROMs
A read only memory (ROM) is essentially a memory device that can be used to store a certain fixed
set of binary information. As outlined earlier, these devices have certain inherent links that can be
made or broken depending upon the type of fusible link to store any user-specified binary information
in the device. While, in the case of a conventional fusible link, relevant interconnections are broken to
program the device, in the case of an antifuse the relevant interconnections are made to do the same
job. This is illustrated in Fig. 9.8. Figure 9.8(a) shows the internal logic diagram of a 4 × 2 PROM. The
figure shows an unprogrammed PROM. Figures 9.8(b) and (c) respectively show the use of a fuse and
an antifuse to produce output-1 = AB. Note that in the case of a fuse an unprogrammed interconnection
is a ‘make’ connection, whereas in the case of an antifuse it is a ‘break’ connection.
Once a given pattern is formed, it remains as such even if power is turned off and on. In the
case of PROMs, the user can erase the data already stored on the ROM chip and load it with
fresh data. Memory-related issues of ROMs are discussed in detail in Chapter 15 on microcomputer
fundamentals. In the present section, we will discuss the use of a PROM as a programmable logic
device for implementation of combinational logic functions, which is one of the most widely exploited
applications of PROMs. A PROM in general has n input lines and m output lines and is designated as
a 2
n
× m PROM. Looking at the internal architecture of a PROM device, it is a combinational circuit
with the AND gates wired as a decoder and having OR gates equal to the number of outputs. A PROM
with five input lines and four output lines, for instance, would have the equivalent of a 5 × 32 decoder
at the input that would generate 32 possible minterms or product terms. Each of these four OR gates
would be a 32-input gate fed from 32 outputs of the decoder through fusible links.
Figure 9.9 shows the internal architecture of a 32 × 4 PROM. We can see that the input side is hardwired to produce all possible 32 product terms corresponding to five variables. All 32 product terms or
minterms are available at the inputs of each of the OR gates through programmable interconnections.
This allows the users to have four different five-variable Boolean functions of their choice. Very complex
combinational functions can be generated with PROMs by suitably making or breaking these links.
To sum up, for implementing an n-input or n-variable, m−output combinational circuit, one would
need a 2
n
× m PROM. As an illustration, let us see how a PROM can be used to implement the
following Boolean function with two outputs given by the equations
F 1 BB CC = 0 2
(9.1)
F 2 BB CC = 1 4 7
(9.2)
Implementation of this Boolean function would require an 8 × 2 PROM. The internal logic diagram
of the PROM in this case, after it is programmed, would be as shown in Fig. 9.10. Note that, in the
programmed PROM of Fig. 9.10, an unprogrammed interconnection indicated by a cross ( × is a
‘make’ connection.
It may be mentioned here that in practice a PROM would not be used to implement as simple a
Boolean function as that illustrated above. The purpose here is to indicate to readers how a PROM
Digital Electronics
large memory, clock management systems and support for many of the contemporary device-to-device
signalling technologies. FPGAs find extensive use in a variety of applications, which include data
processing and storage, digital signal processing, instrumentation and telecommunications.
FPGAs are also programmed like CPLDs after they are soldered onto the PC board. In the case of
FPGAs, the programmed configuration is usually volatile and therefore needs to be reloaded whenever
power is applied or a different functionality is required.
9.3 Programmable ROMs
A read only memory (ROM) is essentially a memory device that can be used to store a certain fixed
set of binary information. As outlined earlier, these devices have certain inherent links that can be
made or broken depending upon the type of fusible link to store any user-specified binary information
in the device. While, in the case of a conventional fusible link, relevant interconnections are broken to
program the device, in the case of an antifuse the relevant interconnections are made to do the same
job. This is illustrated in Fig. 9.8. Figure 9.8(a) shows the internal logic diagram of a 4 × 2 PROM. The
figure shows an unprogrammed PROM. Figures 9.8(b) and (c) respectively show the use of a fuse and
an antifuse to produce output-1 = AB. Note that in the case of a fuse an unprogrammed interconnection
is a ‘make’ connection, whereas in the case of an antifuse it is a ‘break’ connection.
Once a given pattern is formed, it remains as such even if power is turned off and on. In the
case of PROMs, the user can erase the data already stored on the ROM chip and load it with
fresh data. Memory-related issues of ROMs are discussed in detail in Chapter 15 on microcomputer
fundamentals. In the present section, we will discuss the use of a PROM as a programmable logic
device for implementation of combinational logic functions, which is one of the most widely exploited
applications of PROMs. A PROM in general has n input lines and m output lines and is designated as
a 2
n
× m PROM. Looking at the internal architecture of a PROM device, it is a combinational circuit
with the AND gates wired as a decoder and having OR gates equal to the number of outputs. A PROM
with five input lines and four output lines, for instance, would have the equivalent of a 5 × 32 decoder
at the input that would generate 32 possible minterms or product terms. Each of these four OR gates
would be a 32-input gate fed from 32 outputs of the decoder through fusible links.
Figure 9.9 shows the internal architecture of a 32 × 4 PROM. We can see that the input side is hardwired to produce all possible 32 product terms corresponding to five variables. All 32 product terms or
minterms are available at the inputs of each of the OR gates through programmable interconnections.
This allows the users to have four different five-variable Boolean functions of their choice. Very complex
combinational functions can be generated with PROMs by suitably making or breaking these links.
To sum up, for implementing an n-input or n-variable, m−output combinational circuit, one would
need a 2
n
× m PROM. As an illustration, let us see how a PROM can be used to implement the
following Boolean function with two outputs given by the equations
F 1 BB CC = 0 2
(9.1)
F 2 BB CC = 1 4 7
(9.2)
Implementation of this Boolean function would require an 8 × 2 PROM. The internal logic diagram
of the PROM in this case, after it is programmed, would be as shown in Fig. 9.10. Note that, in the
programmed PROM of Fig. 9.10, an unprogrammed interconnection indicated by a cross ( × is a
‘make’ connection.
It may be mentioned here that in practice a PROM would not be used to implement as simple a
Boolean function as that illustrated above. The purpose here is to indicate to readers how a PROM