Arithmetic Circuits
245
FS
Bout
B 3
D 3
D 2
D 1
D 0
B 2
B 1
B 0
A 3
A 2
A 1
A 0
B in = 0
FS
FS
FS
Figure 7.17 Four-bit subtractor.
Figure 7.18 (a) One-bit controlled inverter and (b) eight-bit controlled inverter.
of the input. As an example, 11010010 at the input would produce 00101101 at the output when the
control input is in a logic ‘1’ state.
7.4 Adder–Subtractor
Subtraction of two binary numbers can be accomplished by adding 2’s complement of the subtrahend
to the minuend and disregarding the final carry, if any. If the MSB bit in the result of addition is
245
FS
Bout
B 3
D 3
D 2
D 1
D 0
B 2
B 1
B 0
A 3
A 2
A 1
A 0
B in = 0
FS
FS
FS
Figure 7.17 Four-bit subtractor.
Figure 7.18 (a) One-bit controlled inverter and (b) eight-bit controlled inverter.
of the input. As an example, 11010010 at the input would produce 00101101 at the output when the
control input is in a logic ‘1’ state.
7.4 Adder–Subtractor
Subtraction of two binary numbers can be accomplished by adding 2’s complement of the subtrahend
to the minuend and disregarding the final carry, if any. If the MSB bit in the result of addition is