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Digital Electronics
(b)
D
B o
B in
D
B
A
A
Bin
B
(a)
B o
D
D
B o
A
B
HS
HS
A
B
B out
Figure 7.16 Logic implementation of a full subtractor with half-subtractors.
If we compare these expressions with those derived earlier in the case of a full adder, we find that the
expression for DIFFERENCE output D is the same as that for the SUM output. Also, the expression for
BORROW output B o is similar to the expression for CARRY-OUT C o . In the case of a half-subtractor,
the A input is complemented. By a similar analysis it can be shown that a full subtractor can be
implemented with half-subtractors in the same way as a full adder was constructed using half-adders.
Relevant logic diagrams are shown in Figs 7.16(a) and (b) corresponding to Figs 7.10(a) and (b)
respectively for a full adder.
Again, more than one full subtractor can be connected in cascade to perform subtraction on two
larger binary numbers. As an illustration, Fig. 7.17 shows a four-bit subtractor.
7.3.5 Controlled Inverter
A controlled inverter is needed when an adder is to be used as a subtractor. As outlined earlier,
subtraction is nothing but addition of the 2’s complement of the subtrahend to the minuend. Thus, the
first step towards practical implementation of a subtractor is to determine the 2’s complement of the
subtrahend. And for this, one needs firstly to find 1’s complement. A controlled inverter is used to find
1’s complement. A one-bit controlled inverter is nothing but a two-input EX-OR gate with one of its
inputs treated as a control input, as shown in Fig. 7.18(a). When the control input is LOW, the input
bit is passed as such to the output. (Recall the truth table of an EX-OR gate.) When the control input
is HIGH, the input bit gets complemented at the output. Figure 7.18(b) shows an eight-bit controlled
inverter of this type. When the control input is LOW, the output (Y 7 Y 6 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0 is the same as
the input (A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 . When the control input is HIGH, the output is 1’s complement
Digital Electronics
(b)
D
B o
B in
D
B
A
A
Bin
B
(a)
B o
D
D
B o
A
B
HS
HS
A
B
B out
Figure 7.16 Logic implementation of a full subtractor with half-subtractors.
If we compare these expressions with those derived earlier in the case of a full adder, we find that the
expression for DIFFERENCE output D is the same as that for the SUM output. Also, the expression for
BORROW output B o is similar to the expression for CARRY-OUT C o . In the case of a half-subtractor,
the A input is complemented. By a similar analysis it can be shown that a full subtractor can be
implemented with half-subtractors in the same way as a full adder was constructed using half-adders.
Relevant logic diagrams are shown in Figs 7.16(a) and (b) corresponding to Figs 7.10(a) and (b)
respectively for a full adder.
Again, more than one full subtractor can be connected in cascade to perform subtraction on two
larger binary numbers. As an illustration, Fig. 7.17 shows a four-bit subtractor.
7.3.5 Controlled Inverter
A controlled inverter is needed when an adder is to be used as a subtractor. As outlined earlier,
subtraction is nothing but addition of the 2’s complement of the subtrahend to the minuend. Thus, the
first step towards practical implementation of a subtractor is to determine the 2’s complement of the
subtrahend. And for this, one needs firstly to find 1’s complement. A controlled inverter is used to find
1’s complement. A one-bit controlled inverter is nothing but a two-input EX-OR gate with one of its
inputs treated as a control input, as shown in Fig. 7.18(a). When the control input is LOW, the input
bit is passed as such to the output. (Recall the truth table of an EX-OR gate.) When the control input
is HIGH, the input bit gets complemented at the output. Figure 7.18(b) shows an eight-bit controlled
inverter of this type. When the control input is LOW, the output (Y 7 Y 6 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0 is the same as
the input (A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 . When the control input is HIGH, the output is 1’s complement