Arithmetic Circuits
241
A
(a)
(b)
S
Cout
Cin
B
Half
Adder
Half
Adder
Cin
A
B
S
Cout
Sum
Carry
Sum
Carry
Figure 7.10 Logic implementation of a full adder with half-adders.
FA
Cout
B 3
S 3
S 2
S 1
S 0
B 2
B 1
B 0
A 3
A 2
A 1
A 0
C in
FA
FA
FA
Figure 7.11 Four-bit binary adder.
D = AAB + AAB
(7.12)
B o = AAB
(7.13)
It is obvious that there is no further scope for any simplification of the Boolean expressions given
by Equations (7.12) and (7.13). While the expression for the DIFFERENCE (DD output is that of
241
A
(a)
(b)
S
Cout
Cin
B
Half
Adder
Half
Adder
Cin
A
B
S
Cout
Sum
Carry
Sum
Carry
Figure 7.10 Logic implementation of a full adder with half-adders.
FA
Cout
B 3
S 3
S 2
S 1
S 0
B 2
B 1
B 0
A 3
A 2
A 1
A 0
C in
FA
FA
FA
Figure 7.11 Four-bit binary adder.
D = AAB + AAB
(7.12)
B o = AAB
(7.13)
It is obvious that there is no further scope for any simplification of the Boolean expressions given
by Equations (7.12) and (7.13). While the expression for the DIFFERENCE (DD output is that of