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Digital Electronics
of Boolean expressions. The following guidelines should be followed while choosing the preferred
form for hardware implementation:
1. The implementation should have the minimum number of gates, with the gates used having the
minimum number of inputs.
2. There should be a minimum number of interconnections, and the propagation time should be the
shortest.
3. Limitation on the driving capability of the gates should not be ignored.
It is difficult to generalize as to what constitutes an acceptable simplified Boolean expression. The
importance of each of the above-mentioned aspects is governed by the nature of application.
7.3 Arithmetic Circuits – Basic Building Blocks
In this section, we will discuss those combinational logic building blocks that can be used to perform
addition and subtraction operations on binary numbers. Addition and subtraction are the two most
commonly used arithmetic operations, as the other two, namely multiplication and division, are
respectively the processes of repeated addition and repeated subtraction, as was outlined in Chapter
2 dealing with binary arithmetic. We will begin with the basic building blocks that form the basis of
all hardware used to perform the aforesaid arithmetic operations on binary numbers. These include
half-adder, full adder, half-subtractor, full subtractor and controlled inverter.
7.3.1 Half-Adder
A half-adder is an arithmetic circuit block that can be used to add two bits. Such a circuit thus has two
inputs that represent the two bits to be added and two outputs, with one producing the SUM output
and the other producing the CARRY. Figure 7.4 shows the truth table of a half-adder, showing all
possible input combinations and the corresponding outputs.
The Boolean expressions for the SUM and CARRY outputs are given by the equations
SUM S = AAB + AAB
(7.5)
CARRY C = AAB
(7.6)
An examination of the two expressions tells that there is no scope for further simplification. While
the first one representing the SUM output is that of an EX-OR gate, the second one representing the
Figure 7.4 Truth table of a half-adder.
Digital Electronics
of Boolean expressions. The following guidelines should be followed while choosing the preferred
form for hardware implementation:
1. The implementation should have the minimum number of gates, with the gates used having the
minimum number of inputs.
2. There should be a minimum number of interconnections, and the propagation time should be the
shortest.
3. Limitation on the driving capability of the gates should not be ignored.
It is difficult to generalize as to what constitutes an acceptable simplified Boolean expression. The
importance of each of the above-mentioned aspects is governed by the nature of application.
7.3 Arithmetic Circuits – Basic Building Blocks
In this section, we will discuss those combinational logic building blocks that can be used to perform
addition and subtraction operations on binary numbers. Addition and subtraction are the two most
commonly used arithmetic operations, as the other two, namely multiplication and division, are
respectively the processes of repeated addition and repeated subtraction, as was outlined in Chapter
2 dealing with binary arithmetic. We will begin with the basic building blocks that form the basis of
all hardware used to perform the aforesaid arithmetic operations on binary numbers. These include
half-adder, full adder, half-subtractor, full subtractor and controlled inverter.
7.3.1 Half-Adder
A half-adder is an arithmetic circuit block that can be used to add two bits. Such a circuit thus has two
inputs that represent the two bits to be added and two outputs, with one producing the SUM output
and the other producing the CARRY. Figure 7.4 shows the truth table of a half-adder, showing all
possible input combinations and the corresponding outputs.
The Boolean expressions for the SUM and CARRY outputs are given by the equations
SUM S = AAB + AAB
(7.5)
CARRY C = AAB
(7.6)
An examination of the two expressions tells that there is no scope for further simplification. While
the first one representing the SUM output is that of an EX-OR gate, the second one representing the
Figure 7.4 Truth table of a half-adder.