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Digital Electronics
Example 5.2
Refer to example 5.1. How many NAND gate inputs can be driven from the output of a NAND gate of
this type?
Solution
• This figure is given by the worst-case fan-out specification of the device.
• Now, the HIGH-state fan-out = I OH /I IH = 400/20 = 20.
• The LOW-state fan-out = I OL /I IL = 8/0.4 = 20.
• Therefore, the number of inputs that can be driven from a single output = 20.
Example 5.3
Determine the fan-out of IC 74LS04, given the following data: input loading factor (HIGH
state) = 0.5 UL, input loading factor (LOW state) = 0.25 UL, output loading factor (HIGH state) = 10
UL, output loading factor (LOW state) = 5 UL, where UL is the unit load.
Solution
• The HIGH-state fan-out can be computed from: fan-out = output loading factor (HIGH)/input loading
factor (HIGH) = 10 UL/0.5 UL = 20.
• The LOW-state fan-out can be computed from: fan-out = output loading factor (LOW)/input loading
factor (LOW) = 5 UL/0.25 UL = 20.
• Since the fan-out in the two cases turns out to be the same, it follows that the fan-out = 20.
Example 5.4
A certain TTL gate has I IH = 20 A, I IL = 0.1 mA, I OH = 0.4 mA and I OL = 4 mA. Determine the input
and output loading in the HIGH and LOW states in terms of UL.
Solution
• 1 UL (LOW state) = 1.6 mA and 1 UL (HIGH state) = 40 A.
• The input loading factor (HIGH state) = 20 A = 20/40 = 0.5 UL.
• The input loading factor (LOW state) = 0.1 mA = 0.1/1.6 = 1/16 UL
• The output loading factor (HIGH state) = 0.4 mA = 0.4/0.04 = 10 UL.
• The output loading factor (LOW state) = 4 mA = 4/1.6 = 2.5 UL.
5.3 Transistor Transistor Logic (TTL)
TTL as outlined above stands for transistor transistor logic. It is a logic family implemented with
bipolar process technology that combines or integrates NPN transistors, PN junction diodes and diffused
resistors in a single monolithic structure to get the desired logic function. The NAND gate is the
basic building block of this logic family. Different subfamilies in this logic family, as outlined earlier,
include standard TTL, low-power TTL, high-power TTL, low-power Schottky TTL, Schottky TTL,
advanced low-power Schottky TTL, advanced Schottky TTL and fast TTL. In the following paragraphs,
we will briefly describe each of these subfamilies in terms of internal structure and characteristic
parameters.
Digital Electronics
Example 5.2
Refer to example 5.1. How many NAND gate inputs can be driven from the output of a NAND gate of
this type?
Solution
• This figure is given by the worst-case fan-out specification of the device.
• Now, the HIGH-state fan-out = I OH /I IH = 400/20 = 20.
• The LOW-state fan-out = I OL /I IL = 8/0.4 = 20.
• Therefore, the number of inputs that can be driven from a single output = 20.
Example 5.3
Determine the fan-out of IC 74LS04, given the following data: input loading factor (HIGH
state) = 0.5 UL, input loading factor (LOW state) = 0.25 UL, output loading factor (HIGH state) = 10
UL, output loading factor (LOW state) = 5 UL, where UL is the unit load.
Solution
• The HIGH-state fan-out can be computed from: fan-out = output loading factor (HIGH)/input loading
factor (HIGH) = 10 UL/0.5 UL = 20.
• The LOW-state fan-out can be computed from: fan-out = output loading factor (LOW)/input loading
factor (LOW) = 5 UL/0.25 UL = 20.
• Since the fan-out in the two cases turns out to be the same, it follows that the fan-out = 20.
Example 5.4
A certain TTL gate has I IH = 20 A, I IL = 0.1 mA, I OH = 0.4 mA and I OL = 4 mA. Determine the input
and output loading in the HIGH and LOW states in terms of UL.
Solution
• 1 UL (LOW state) = 1.6 mA and 1 UL (HIGH state) = 40 A.
• The input loading factor (HIGH state) = 20 A = 20/40 = 0.5 UL.
• The input loading factor (LOW state) = 0.1 mA = 0.1/1.6 = 1/16 UL
• The output loading factor (HIGH state) = 0.4 mA = 0.4/0.04 = 10 UL.
• The output loading factor (LOW state) = 4 mA = 4/1.6 = 2.5 UL.
5.3 Transistor Transistor Logic (TTL)
TTL as outlined above stands for transistor transistor logic. It is a logic family implemented with
bipolar process technology that combines or integrates NPN transistors, PN junction diodes and diffused
resistors in a single monolithic structure to get the desired logic function. The NAND gate is the
basic building block of this logic family. Different subfamilies in this logic family, as outlined earlier,
include standard TTL, low-power TTL, high-power TTL, low-power Schottky TTL, Schottky TTL,
advanced low-power Schottky TTL, advanced Schottky TTL and fast TTL. In the following paragraphs,
we will briefly describe each of these subfamilies in terms of internal structure and characteristic
parameters.