xiv
Contents
11 Counters and Registers
411
11.1
Ripple (Asynchronous) Counter
411
11.1.1
Propagation Delay in Ripple Counters
412
11.2
Synchronous Counter
413
11.3
Modulus of a Counter
413
11.4
Binary Ripple Counter – Operational Basics
413
11.4.1
Binary Ripple Counters with a Modulus of Less than 2
N
416
11.4.2
Ripple Counters in IC Form
418
11.5
Synchronous (or Parallel) Counters
423
11.6
UP/DOWN Counters
425
11.7
Decade and BCD Counters
426
11.8
Presettable Counters
426
11.8.1
Variable Modulus with Presettable Counters
428
11.9
Decoding a Counter
428
11.10 Cascading Counters
433
11.10.1 Cascading Binary Counters
433
11.10.2 Cascading BCD Counters
435
11.11 Designing Counters with Arbitrary Sequences
438
11.11.1 Excitation Table of a Flip-Flop
438
11.11.2 State Transition Diagram
439
11.11.3 Design Procedure
439
11.12 Shift Register
447
11.12.1 Serial-In Serial-Out Shift Register
449
11.12.2 Serial-In Parallel-Out Shift Register
452
11.12.3 Parallel-In Serial-Out Shift Register
452
11.12.4 Parallel-In Parallel-Out Shift Register
453
11.12.5 Bidirectional Shift Register
455
11.12.6 Universal Shift Register
455
11.13 Shift Register Counters
459
11.13.1 Ring Counter
459
11.13.2 Shift Counter
460
11.14 IEEE/ANSI Symbology for Registers and Counters
464
11.14.1 Counters
464
11.14.2 Registers
466
11.15 Application-Relevant Information
466
Review Questions
466
Problems
469
Further Reading
471
12 Data Conversion Circuits – D/A and A/D Converters
473
12.1
Digital-to-Analogue Converters
473
12.1.1
Simple Resistive Divider Network for D/A Conversion
474
12.1.2
Binary Ladder Network for D/A Conversion
475
12.2
D/A Converter Specifications
476
12.2.1
Resolution
476
12.2.2
Accuracy
477
12.2.3
Conversion Speed or Settling Time
477
12.2.4
Dynamic Range
478
Contents
11 Counters and Registers
411
11.1
Ripple (Asynchronous) Counter
411
11.1.1
Propagation Delay in Ripple Counters
412
11.2
Synchronous Counter
413
11.3
Modulus of a Counter
413
11.4
Binary Ripple Counter – Operational Basics
413
11.4.1
Binary Ripple Counters with a Modulus of Less than 2
N
416
11.4.2
Ripple Counters in IC Form
418
11.5
Synchronous (or Parallel) Counters
423
11.6
UP/DOWN Counters
425
11.7
Decade and BCD Counters
426
11.8
Presettable Counters
426
11.8.1
Variable Modulus with Presettable Counters
428
11.9
Decoding a Counter
428
11.10 Cascading Counters
433
11.10.1 Cascading Binary Counters
433
11.10.2 Cascading BCD Counters
435
11.11 Designing Counters with Arbitrary Sequences
438
11.11.1 Excitation Table of a Flip-Flop
438
11.11.2 State Transition Diagram
439
11.11.3 Design Procedure
439
11.12 Shift Register
447
11.12.1 Serial-In Serial-Out Shift Register
449
11.12.2 Serial-In Parallel-Out Shift Register
452
11.12.3 Parallel-In Serial-Out Shift Register
452
11.12.4 Parallel-In Parallel-Out Shift Register
453
11.12.5 Bidirectional Shift Register
455
11.12.6 Universal Shift Register
455
11.13 Shift Register Counters
459
11.13.1 Ring Counter
459
11.13.2 Shift Counter
460
11.14 IEEE/ANSI Symbology for Registers and Counters
464
11.14.1 Counters
464
11.14.2 Registers
466
11.15 Application-Relevant Information
466
Review Questions
466
Problems
469
Further Reading
471
12 Data Conversion Circuits – D/A and A/D Converters
473
12.1
Digital-to-Analogue Converters
473
12.1.1
Simple Resistive Divider Network for D/A Conversion
474
12.1.2
Binary Ladder Network for D/A Conversion
475
12.2
D/A Converter Specifications
476
12.2.1
Resolution
476
12.2.2
Accuracy
477
12.2.3
Conversion Speed or Settling Time
477
12.2.4
Dynamic Range
478
