Logic Gates and Related Devices
89
A
B
C
E A
E B
E C
To other
circuits
Common
Bus
Figure 4.28 Paralleling of tristate inverters.
A
B
C
D
(a)
A
B
C
D
(b)
(AB+CD)
(A+B)(C+D)
Figure 4.29 AND-OR-INVERT and OR-AND-INVERT gates.
A
B
C
D
E
F
G
H
(ABCD+EFGH)
Figure 4.30 Two-wide, four-input AND-OR-INVERT gate.