26
Figure 2-5 shows the flow implemented by libpmem, which initially verifies the
memory-mapped file (called a memory pool), resides on a file system that has the DAX
feature enabled, and is backed by physical persistent memory. Chapter 3 describes DAX
in more detail.
On Linux, direct access is achieved by mounting an XFS or ext4 file system with
the "-o dax" option. On Microsoft Windows, NTFS enables DAX when the volume
is created and formatted using the DAX option. If the file system is not DAX-enabled,
applications should fall back to the legacy approach of using msync(), fsync(), or
FlushFileBuffers(). If the file system is DAX-enabled, the next check is to determine
whether the platform supports ADR or eADR by verifying whether or not the CPU caches
are considered persistent. On an eADR platform where CPU caches are considered
persistent, no further action is required. Any data written will be considered persistent,
and thus there is no requirement to perform any flushes, which is a significant
performance optimization. On an ADR platform, the next sequence of events identifies
the most optimal flush operation based on Intel machine instructions previously
described.
Figure 2-5. Flowchart showing how applications can detect platform features
Chapter 2 persistent MeMory arChiteCture
Figure 2-5 shows the flow implemented by libpmem, which initially verifies the
memory-mapped file (called a memory pool), resides on a file system that has the DAX
feature enabled, and is backed by physical persistent memory. Chapter 3 describes DAX
in more detail.
On Linux, direct access is achieved by mounting an XFS or ext4 file system with
the "-o dax" option. On Microsoft Windows, NTFS enables DAX when the volume
is created and formatted using the DAX option. If the file system is not DAX-enabled,
applications should fall back to the legacy approach of using msync(), fsync(), or
FlushFileBuffers(). If the file system is DAX-enabled, the next check is to determine
whether the platform supports ADR or eADR by verifying whether or not the CPU caches
are considered persistent. On an eADR platform where CPU caches are considered
persistent, no further action is required. Any data written will be considered persistent,
and thus there is no requirement to perform any flushes, which is a significant
performance optimization. On an ADR platform, the next sequence of events identifies
the most optimal flush operation based on Intel machine instructions previously
described.
Figure 2-5. Flowchart showing how applications can detect platform features
Chapter 2 persistent MeMory arChiteCture