25
Detecting Platform Capabilities
Server platform, CPU, and persistent memory features and capabilities are exposed to
the operating system through the BIOS and ACPI that can be queried by applications.
Applications should not assume they are running on hardware with all the optimizations
available. Even if the physical hardware supports it, virtualization technologies may or
may not expose those features to the guests, or your operating system may or may not
implement them. As such, we encourage developers to use libraries, such as those in the
PMDK, that perform the required feature checks or implement the checks within the
application code base.
OPCODE
Description
SFENCE
performs a serializing operation on all store-to-memory instructions that were
issued prior to the SFENCE instruction. this serializing operation guarantees
that every store instruction that precedes in program order the SFENCE
instruction is globally visible before any store instruction that follows the
SFENCE instruction can be globally visible. the SFENCE instruction is ordered
with respect to store instructions, other SFENCE instructions, any MFENCE
instructions, and any serializing instructions (such as the CpuiD instruction). it is
not ordered with respect to load instructions or the LFENCE instruction.
WBINVD
this kernel-mode-only instruction flushes and invalidates every cache line on
the Cpu that executes it. after executing this on all Cpus, all stores to persistent
memory are certainly in the persistence domain, but all cache lines are empty,
impacting performance. also, the overhead of sending a message to each Cpu
to execute this instruction can be significant. Because of this, WBINVD is only
expected to be used by the kernel for flushing very large ranges (at least many
megabytes).
Table 2-1. (continued)
Chapter 2 persistent MeMory arChiteCture
Detecting Platform Capabilities
Server platform, CPU, and persistent memory features and capabilities are exposed to
the operating system through the BIOS and ACPI that can be queried by applications.
Applications should not assume they are running on hardware with all the optimizations
available. Even if the physical hardware supports it, virtualization technologies may or
may not expose those features to the guests, or your operating system may or may not
implement them. As such, we encourage developers to use libraries, such as those in the
PMDK, that perform the required feature checks or implement the checks within the
application code base.
OPCODE
Description
SFENCE
performs a serializing operation on all store-to-memory instructions that were
issued prior to the SFENCE instruction. this serializing operation guarantees
that every store instruction that precedes in program order the SFENCE
instruction is globally visible before any store instruction that follows the
SFENCE instruction can be globally visible. the SFENCE instruction is ordered
with respect to store instructions, other SFENCE instructions, any MFENCE
instructions, and any serializing instructions (such as the CpuiD instruction). it is
not ordered with respect to load instructions or the LFENCE instruction.
WBINVD
this kernel-mode-only instruction flushes and invalidates every cache line on
the Cpu that executes it. after executing this on all Cpus, all stores to persistent
memory are certainly in the persistence domain, but all cache lines are empty,
impacting performance. also, the overhead of sending a message to each Cpu
to execute this instruction can be significant. Because of this, WBINVD is only
expected to be used by the kernel for flushing very large ranges (at least many
megabytes).
Table 2-1. (continued)
Chapter 2 persistent MeMory arChiteCture