Acknowledgement Authors thank Dr. Makimoto for his precious advice. We will proceed the
development of atomic switch FPGA based on GPE architecture aiming at to become one of the
Highly Flexible Super Integration (HFSI). Authors also thank Dr. Asai, who was Research
Supervisor of CREST DVLSI Program, and staff members of JST for their arrangement of the
CREST DVLSI (Dependable VLSI) symposium. Some part of the measurement work of power
consumption was supported by the Grant-in-Aid for Energy and Environmental New Technology
Leading Program of the New Energy and Industrial Technology Development Organization
(NEDO) of Japan.
References
1. http://www.nec.com/en/global/solutions/nsp/m2m/concept/
2. Hihara, H., Iwasaki, A., Hashimoto, M., Ochi, H., Mitsuyama, Y., Onodera, H., Kanbara, H.,
Wakabayashi, K., Sugibayashi, T., Takenaka, T., Hada, H., Tada, M., Miyamura, M.,
Sakamoto, T.: Sensor signal processing using high-level synthesis with a layered architecture.
IEEE Embed. Syst. Lett. 10(4), 119–122 (2018)
3. Alnajjar, D., Konoura, H., Mitsuyama, Y., Shimada, H., Kobayashi, K., Kanbara, H., Ochi, H.,
Imagawa, T., Noda, S., Wakabayashi, K., Hashimoto, M., Onoye, T., Onodera, H.: Reliabilityconfigurable mixed-grained reconfigurable array supporting C-to-array mapping and its radiation testing. In: Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC 2013),
pp. 313–316 (2013)
4. Konoura, H., Alnajjar, D., Mitsuyama, Y., Shimada, H., Kobayashi, K., Kanbara, H., Ochi, H.,
Imagawa, T., Wakabayashi, K., Hashimoto, M., Onoye, T., Onodera, H.: Reliabilityconfigurable mixed-grained reconfigurable array supporting C-based design and its irradiation
testing. IEICE Trans. Fund. Electron. Commun. Comput. Sci. E97-A(12), 2518–2529 (2014)
5. Awashima, T.: Full software implementation of real-time ISDB-T modulator on dynamically
reconfigurable SoC using practical co-design environment. In: Invited Talk, CoolChips XIV,
Yokohama Industrial Development Corporation, 20th, (2011)
6. Wakabayashi, K., Schafer, B.C.: “All-in-C” SoC synthesis and verification with
CyberWorkBench. In: Coussy, P., Morawiec, A. (eds.) High-Level Synthesis from Algorithm
to Digital Circuit, vol. XVI, pp. 113–127. Springer, Heidelberg (2008). isbn:978-1-4020-85871,. Chapter 7
7. Wakabayashi, K., Okamoto, T.: C-based SoC design flow and EDA tools. IEEE Trans. CAD
1507–1522 (2000)
8. Wakabayashi, K.: CyberWorkBench: Integrated design environment based on C-based behavior synthesis and verification. IEEE VLSI-TSA 173–176 (2005)
9. https://www.nec.com/en/global/solutions/space/remote_sensing/
10. Yokoyama, Y., Kondo, M., Hihara, H., Itoh, T., Kawamata, F.: The development of space-born
router for the International Space Station. In: Proceedings of International Conference 2001,
pp. 115–110 (2001)
11. Oyama, H., Sakurai, M. (The Japan Society for Aeronautical and Space Sciences), Iwasaki,
A. (the University of Tokyo), Takahashi, Y., Toyoshima, M. (National Institute of Information
and Communications Technology). The 201st board of governors materials. Science Council of
Japan, 19 Sept 2014. http://www.scj.go.jp/ja/member/iinkai/kanji/pdf22/siryo201-5-10-7.pdf
12. Hihara, H.: Thought on ensuring design quality. Design Wave Magazine. CQ Publishing,
pp 36–45, February 2006
13. Baumann, R.: The impact of technology scaling on soft error rate performance and limits to the
efficacy of error correction. In: Digest IEDM 2002, pp. 329–332 (2002)
14. Fukuhara, T., Taguchi, M., Imamura, T., Nakamura, M., Ueno, M., Suzuki, M., Iwagami, N.,
Sato, M., Mitsuyama, K., Hashimoto, G.L., Ohshima, R., Kouyama, T., Ando, H., Futaguchi,
M.: LIR: Longwave infrared camera onboard the Venus orbiter Akatsuki. Earth Planets Space.
63, 1009–1010 (2011)
Atomic Switch FPGA: Application for IoT Sensing Systems in Space
57
development of atomic switch FPGA based on GPE architecture aiming at to become one of the
Highly Flexible Super Integration (HFSI). Authors also thank Dr. Asai, who was Research
Supervisor of CREST DVLSI Program, and staff members of JST for their arrangement of the
CREST DVLSI (Dependable VLSI) symposium. Some part of the measurement work of power
consumption was supported by the Grant-in-Aid for Energy and Environmental New Technology
Leading Program of the New Energy and Industrial Technology Development Organization
(NEDO) of Japan.
References
1. http://www.nec.com/en/global/solutions/nsp/m2m/concept/
2. Hihara, H., Iwasaki, A., Hashimoto, M., Ochi, H., Mitsuyama, Y., Onodera, H., Kanbara, H.,
Wakabayashi, K., Sugibayashi, T., Takenaka, T., Hada, H., Tada, M., Miyamura, M.,
Sakamoto, T.: Sensor signal processing using high-level synthesis with a layered architecture.
IEEE Embed. Syst. Lett. 10(4), 119–122 (2018)
3. Alnajjar, D., Konoura, H., Mitsuyama, Y., Shimada, H., Kobayashi, K., Kanbara, H., Ochi, H.,
Imagawa, T., Noda, S., Wakabayashi, K., Hashimoto, M., Onoye, T., Onodera, H.: Reliabilityconfigurable mixed-grained reconfigurable array supporting C-to-array mapping and its radiation testing. In: Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC 2013),
pp. 313–316 (2013)
4. Konoura, H., Alnajjar, D., Mitsuyama, Y., Shimada, H., Kobayashi, K., Kanbara, H., Ochi, H.,
Imagawa, T., Wakabayashi, K., Hashimoto, M., Onoye, T., Onodera, H.: Reliabilityconfigurable mixed-grained reconfigurable array supporting C-based design and its irradiation
testing. IEICE Trans. Fund. Electron. Commun. Comput. Sci. E97-A(12), 2518–2529 (2014)
5. Awashima, T.: Full software implementation of real-time ISDB-T modulator on dynamically
reconfigurable SoC using practical co-design environment. In: Invited Talk, CoolChips XIV,
Yokohama Industrial Development Corporation, 20th, (2011)
6. Wakabayashi, K., Schafer, B.C.: “All-in-C” SoC synthesis and verification with
CyberWorkBench. In: Coussy, P., Morawiec, A. (eds.) High-Level Synthesis from Algorithm
to Digital Circuit, vol. XVI, pp. 113–127. Springer, Heidelberg (2008). isbn:978-1-4020-85871,. Chapter 7
7. Wakabayashi, K., Okamoto, T.: C-based SoC design flow and EDA tools. IEEE Trans. CAD
1507–1522 (2000)
8. Wakabayashi, K.: CyberWorkBench: Integrated design environment based on C-based behavior synthesis and verification. IEEE VLSI-TSA 173–176 (2005)
9. https://www.nec.com/en/global/solutions/space/remote_sensing/
10. Yokoyama, Y., Kondo, M., Hihara, H., Itoh, T., Kawamata, F.: The development of space-born
router for the International Space Station. In: Proceedings of International Conference 2001,
pp. 115–110 (2001)
11. Oyama, H., Sakurai, M. (The Japan Society for Aeronautical and Space Sciences), Iwasaki,
A. (the University of Tokyo), Takahashi, Y., Toyoshima, M. (National Institute of Information
and Communications Technology). The 201st board of governors materials. Science Council of
Japan, 19 Sept 2014. http://www.scj.go.jp/ja/member/iinkai/kanji/pdf22/siryo201-5-10-7.pdf
12. Hihara, H.: Thought on ensuring design quality. Design Wave Magazine. CQ Publishing,
pp 36–45, February 2006
13. Baumann, R.: The impact of technology scaling on soft error rate performance and limits to the
efficacy of error correction. In: Digest IEDM 2002, pp. 329–332 (2002)
14. Fukuhara, T., Taguchi, M., Imamura, T., Nakamura, M., Ueno, M., Suzuki, M., Iwagami, N.,
Sato, M., Mitsuyama, K., Hashimoto, G.L., Ohshima, R., Kouyama, T., Ando, H., Futaguchi,
M.: LIR: Longwave infrared camera onboard the Venus orbiter Akatsuki. Earth Planets Space.
63, 1009–1010 (2011)
Atomic Switch FPGA: Application for IoT Sensing Systems in Space
57