4.2 Network Functionalization
Devices are functionalized through the deposition of an insulator onto metallic
nanowires. In the case of Ag|Ag 2 S|Ag, a temperature controlled sublimation of
cyclooctasulfur (S 8 ) is then directed from a sulfur chamber to another chamber
containing the sample using a carrier gas. Sulfur gas is exposed to the silver networks
for 5 min and the ASN chips are then removed and stored in vacuum. A slow
diffusion reaction governs the movement of sulfur into the silver lattice, which can
be assessed by monitoring the electrical this time resistance of the device and if
necessary consecutive sulfurizations are performed to obtain the optimum sulfide
coverage. The surface chemical reaction can be written as:
S 8 g
ð Þ þ 16 Ag s
ð Þ ! 8Ag 2 S s
ð Þ
Once the desired resistance is reached, the network is initialized in a process
called electroforming by sweeping a triangular voltage waveform across the network
via the contact electrodes. The triangular sweeps induce a current flow across the
device through complex pathways, and with adequate voltage, the device is able to
form tiny filaments. A multitude of junctions form creating a conductive pathway to
ground, and thus increased current. This increasing current flow through the device
can be seen in Fig. 5 and depicts this electroformation of numerous nanofilamentary
pathways throughout the atomic switch network.
4.3 Device Fabrication
Over the years there have been multiple generations of ASN devices, starting with
simple two electrode devices all the way up to 128 electrodes chips. Devices with
4, 16 and 128 electrodes are shown in Fig. 2. Patterned seed networks consist of a
2 μm layer of AZ nLOF 2020 (a negative photoresist), a soft bake, followed by UV
photolithography, and a post-exposure bake. This resist is developed in MF26A,
rinsed with isopropanol, and a 300 nm layer of copper is then deposited and lifted off
overnight in acetone. Copper lift off occurs leaving a patterned grid of copper posts
~300 nm thick. These patterned seeds enable a level of network density control not
previously realized in earlier experiments. The process provides a level of reproducible control over the spontaneous growth of materials that are CMOS compatible
and most importantly for alternative computing: structurally complex.
218
R. Aguilera et al.
Devices are functionalized through the deposition of an insulator onto metallic
nanowires. In the case of Ag|Ag 2 S|Ag, a temperature controlled sublimation of
cyclooctasulfur (S 8 ) is then directed from a sulfur chamber to another chamber
containing the sample using a carrier gas. Sulfur gas is exposed to the silver networks
for 5 min and the ASN chips are then removed and stored in vacuum. A slow
diffusion reaction governs the movement of sulfur into the silver lattice, which can
be assessed by monitoring the electrical this time resistance of the device and if
necessary consecutive sulfurizations are performed to obtain the optimum sulfide
coverage. The surface chemical reaction can be written as:
S 8 g
ð Þ þ 16 Ag s
ð Þ ! 8Ag 2 S s
ð Þ
Once the desired resistance is reached, the network is initialized in a process
called electroforming by sweeping a triangular voltage waveform across the network
via the contact electrodes. The triangular sweeps induce a current flow across the
device through complex pathways, and with adequate voltage, the device is able to
form tiny filaments. A multitude of junctions form creating a conductive pathway to
ground, and thus increased current. This increasing current flow through the device
can be seen in Fig. 5 and depicts this electroformation of numerous nanofilamentary
pathways throughout the atomic switch network.
4.3 Device Fabrication
Over the years there have been multiple generations of ASN devices, starting with
simple two electrode devices all the way up to 128 electrodes chips. Devices with
4, 16 and 128 electrodes are shown in Fig. 2. Patterned seed networks consist of a
2 μm layer of AZ nLOF 2020 (a negative photoresist), a soft bake, followed by UV
photolithography, and a post-exposure bake. This resist is developed in MF26A,
rinsed with isopropanol, and a 300 nm layer of copper is then deposited and lifted off
overnight in acetone. Copper lift off occurs leaving a patterned grid of copper posts
~300 nm thick. These patterned seeds enable a level of network density control not
previously realized in earlier experiments. The process provides a level of reproducible control over the spontaneous growth of materials that are CMOS compatible
and most importantly for alternative computing: structurally complex.
218
R. Aguilera et al.