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IEEE, 2016.
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and methods of operating same, author=Proebsting, Robert J and Park, Kee and Chu, Scott
Yu-Fan, January 4 2005. US Patent 6,839,256.
81. Amit Agarwal, Steven Hsu, Sanu Mathew, Mark Anders, Himanshu Kaul, Farhana Sheikh,
and Ram Krishnamurthy. A 128× 128b high-speed wide-and match-line content addressable
memory in 32nm CMOS. In ESSCIRC (ESSCIRC), 2011 Proceedings of the, pages 83–86.
IEEE, 2011.
82. Anh Tuan Do, Chun Yin, Kiat Seng Yeo, and Tony Tae-Hyoung Kim. Design of a powerefficient CAM using automated background checking scheme for small match line swing. In
ESSCIRC (ESSCIRC), 2013 Proceedings of the, pages 209–212. IEEE, 2013.
83. Chua-Chin Wang, Chia-Hao Hsu, Chi-Chun Huang, and Jun-Han Wu. A self-disabled sensing
technique for content-addressable memories. IEEE Transactions on Circuits and Systems II:
Express Briefs, 57(1):31–35, 2010.
84. Mrigank Sharad, Deliang Fan, and Kaushik Roy. Ultra low power associative computing with
spin neurons and resistive crossbar memory. In Design Automation Conference (DAC), 2013
50th ACM/EDAC/IEEE, pages 1–6. IEEE, 2013.
85. Yuanfan Yang, Jimson Mathew, and Dhiraj K Pradhan. Matching in memristor based autoassociative memory with application to pattern recognition. In Signal Processing (ICSP), 2014
12th International Conference on, pages 1463–1468. IEEE, 2014.
86. Amirali Ghofrani, Abbas Rahimi, Miguel A Lastras-Montaño, Luca Benini, Rajesh K Gupta,
and Kwang-Ting Cheng. Associative Memristive Memory for Approximate Computing in
GPUs. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 6(2):222–234,
2016.
87. Mohsen Imani, Abbas Rahimi, and Tajana S Rosing. Resistive configurable associative
memory for approximate computing. In Design, Automation & Test in Europe Conference
& Exhibition (DATE), 2016, pages 1327–1332. IEEE, 2016.
88. Mohsen Imani, Pietro Mercati, and Tajana Rosing. ReMAM: low-energy resistive multi-stage
associative memory for energy efficient computing. In Quality Electronic Design (ISQED),
2016 17th International Symposium on, pages 101–106. IEEE, 2016.
89. Mohsen Imani, Shruti Patil, and Tajana Rosing. Approximate computing using multiple-access
single-charge associative memory. IEEE Transactions on Emerging Topics in Computing,
2016.
90. Hang Zhang, Mateja Putic, and John Lach. Low-power gpgpu computation with imprecise
hardware. In Proceedings of the 51st Annual Design Automation Conference, pages 1–6. ACM,
2014.
91. Syed Z Gilani, Nam Sung Kim, and Michael Schulte. Scratchpad memory optimizations for
digital signal processing applications. In Design, Automation & Test in Europe Conference &
Exhibition (DATE), 2011, pages 1–6. IEEE, 2011.
92. Fabio Frustaci, Mahmood Khayatzadeh, David Blaauw, Dennis Sylvester, and Massimo Alioto.
A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality
management in 28nm CMOS. In Solid-State Circuits Conference Digest of Technical Papers
(ISSCC), 2014 IEEE International, pages 244–245. IEEE, 2014.
93. Navneet Gupta, Prashant Dubey, Shaileshkumar Pathak, Kaushik Saha, Ashish Kumar, and
R Sai KRISHNA. Memory architecture and design methodology with adaptive read, May 27
2014. US Patent 8,737,144.
94. Daeyeon Kim, Vikas Chandra, Robert Aitken, David Blaauw, and Dennis Sylvester. An
adaptive write word-line pulse width and voltage modulation architecture for bit-interleaved
8T SRAMs. In Proceedings of the 2012 ACM/IEEE international symposium on Low power
electronics and design, pages 91–96. ACM, 2012.