References
1. Costin Anghel, Prathyusha Chilagani, Amara Amara, and Andrei Vladimirescu. Tunnel field
effect transistor with increased ON current, low-k spacer and high-k dielectric. Applied Physics
Letters, 96(12):122104, 2010.
2. Massimo Alioto. Ultra-low power design approaches for IoT. In Hot Chips Symposium, pages
1–57, 2014.
3. ITRS Organization. International Technology Roadmap for Semiconductors Roadmap.
4. Vinay Saripalli, Asit Mishra, Suman Datta, and Vijaykrishnan Narayanan. An energy-efficient
heterogeneous CMP based on hybrid TFET-CMOS cores. In Design Automation Conference
(DAC), 2011 48th ACM/EDAC/IEEE, pages 729–734. IEEE, 2011.
5. Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut
Kandemir, and Suman Datta. Improving energy efficiency of multi-threaded applications using
heterogeneous CMOS-TFET multicores. In Proceedings of the 17th IEEE/ACM international
symposium on Low-power electronics and design, pages 247–252. IEEE Press, 2011.
6. Supreet Jeloka, Naveen Akesh, Dennis Sylvester, and David Blaauw. A configurable
TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell. In VLSI Circuits (VLSI Circuits),
2015 Symposium on, pages C272–C273. IEEE, 2015.
7. Stefan Rusu, Harry Muljono, David Ayers, Simon Tam, Wei Chen, Aaron Martin, Shenggao
Li, Sujal Vora, Raj Varada, and Eddie Wang. A 22 nm 15-Core Enterprise Xeon® Processor
Family. IEEE Journal of Solid-State Circuits, 50(1):35–48, 2015.
8. Toshikazu Fukuda, Koji Kohara, Toshiaki Dozaka, Yasuhisa Takeyama, Tsuyoshi Midorikawa,
Kenji Hashimoto, Ichiro Wakiyama, Shinji Miyano, and Takehiko Hojo. A 7ns-access-time
25μW/MHz 128kb SRAM for low-power fast wake-up MCU in 65nm CMOS with 27fA/b
retention current. In Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014
IEEE International, pages 236–237. IEEE, 2014.
9. James Myers, Anand Savanth, David Howard, Rohan Gaddh, Pranay Prabhat, and David Flynn.
8.1 An 80nW retention 11.7 pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in
65nm CMOS for WSN applications. In Solid-State Circuits Conference-(ISSCC), 2015 IEEE
International, pages 1–3. IEEE, 2015.
10. Mahmood Khayatzadeh, Xiaoyang Zhang, Jun Tan, Wen-Sin Liew, and Yong Lian. A 0.7-v
17.4-/spl mu/w 3-lead wireless ecg soc. IEEE transactions on biomedical circuits and systems,
7(5):583–592, 2013.
11. Scott Hanson, Mingoo Seok, Yu-Shiang Lin, ZhiYoong Foo, Daeyeon Kim, Yoonmyung Lee,
Nurrachman Liu, Dennis Sylvester, and David Blaauw. A low-voltage processor for sensing
applications with picowatt standby mode. IEEE Journal of Solid-State Circuits, 44(4):1145–
1155, 2009.
© Springer Nature Switzerland AG 2021
N. Gupta et al., TFET Integrated Circuits,
https://doi.org/10.1007/978-3-030-55119-3
127
1. Costin Anghel, Prathyusha Chilagani, Amara Amara, and Andrei Vladimirescu. Tunnel field
effect transistor with increased ON current, low-k spacer and high-k dielectric. Applied Physics
Letters, 96(12):122104, 2010.
2. Massimo Alioto. Ultra-low power design approaches for IoT. In Hot Chips Symposium, pages
1–57, 2014.
3. ITRS Organization. International Technology Roadmap for Semiconductors Roadmap.
4. Vinay Saripalli, Asit Mishra, Suman Datta, and Vijaykrishnan Narayanan. An energy-efficient
heterogeneous CMP based on hybrid TFET-CMOS cores. In Design Automation Conference
(DAC), 2011 48th ACM/EDAC/IEEE, pages 729–734. IEEE, 2011.
5. Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut
Kandemir, and Suman Datta. Improving energy efficiency of multi-threaded applications using
heterogeneous CMOS-TFET multicores. In Proceedings of the 17th IEEE/ACM international
symposium on Low-power electronics and design, pages 247–252. IEEE Press, 2011.
6. Supreet Jeloka, Naveen Akesh, Dennis Sylvester, and David Blaauw. A configurable
TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell. In VLSI Circuits (VLSI Circuits),
2015 Symposium on, pages C272–C273. IEEE, 2015.
7. Stefan Rusu, Harry Muljono, David Ayers, Simon Tam, Wei Chen, Aaron Martin, Shenggao
Li, Sujal Vora, Raj Varada, and Eddie Wang. A 22 nm 15-Core Enterprise Xeon® Processor
Family. IEEE Journal of Solid-State Circuits, 50(1):35–48, 2015.
8. Toshikazu Fukuda, Koji Kohara, Toshiaki Dozaka, Yasuhisa Takeyama, Tsuyoshi Midorikawa,
Kenji Hashimoto, Ichiro Wakiyama, Shinji Miyano, and Takehiko Hojo. A 7ns-access-time
25μW/MHz 128kb SRAM for low-power fast wake-up MCU in 65nm CMOS with 27fA/b
retention current. In Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014
IEEE International, pages 236–237. IEEE, 2014.
9. James Myers, Anand Savanth, David Howard, Rohan Gaddh, Pranay Prabhat, and David Flynn.
8.1 An 80nW retention 11.7 pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in
65nm CMOS for WSN applications. In Solid-State Circuits Conference-(ISSCC), 2015 IEEE
International, pages 1–3. IEEE, 2015.
10. Mahmood Khayatzadeh, Xiaoyang Zhang, Jun Tan, Wen-Sin Liew, and Yong Lian. A 0.7-v
17.4-/spl mu/w 3-lead wireless ecg soc. IEEE transactions on biomedical circuits and systems,
7(5):583–592, 2013.
11. Scott Hanson, Mingoo Seok, Yu-Shiang Lin, ZhiYoong Foo, Daeyeon Kim, Yoonmyung Lee,
Nurrachman Liu, Dennis Sylvester, and David Blaauw. A low-voltage processor for sensing
applications with picowatt standby mode. IEEE Journal of Solid-State Circuits, 44(4):1145–
1155, 2009.
© Springer Nature Switzerland AG 2021
N. Gupta et al., TFET Integrated Circuits,
https://doi.org/10.1007/978-3-030-55119-3
127