2.1 Ideal Memristor: Basic Properties and Signatures
41
Fig. 2.14 Admissible pairs of D in the (v, i)- and (ϕ, q)-domain. (a) The voltage and current pair
of D describes a pinched hysteresis loop in the voltage-current domain. (b) The flux and charge
pair of D describes a cubic CR in the flux-charge domain
Fig. 2.15 (a) Characteristic of an active charge-controlled memristor. (b) Hysteresis loop when
the memristor is subject to a sinusoidal current. (c) Time-domain behavior of charge and flux and
(d) of current and voltage
predicting ability since different periodic input (voltages) yield different periodic
responses (currents) and then different pinched hysteresis loops.
Example 2.6 (Zero-Crossing Property for an Active Ideal Memristor) Let us consider an active charge-controlled memristor with CR ϕ = −13q +
1
3 q 3 . Figure 2.15
shows the hysteresis loop displayed when the memristor is subject to a sinusoidal
current i(t) = 3 sin(t) and q(0) = 0. Note that the loop intersects the second and
fourth quadrant of the v–i plane. Moreover, there are instants such that the voltage
is 0 but the current does not vanish, thus violating the simultaneous zero crossing
property of voltage and current.
41
Fig. 2.14 Admissible pairs of D in the (v, i)- and (ϕ, q)-domain. (a) The voltage and current pair
of D describes a pinched hysteresis loop in the voltage-current domain. (b) The flux and charge
pair of D describes a cubic CR in the flux-charge domain
Fig. 2.15 (a) Characteristic of an active charge-controlled memristor. (b) Hysteresis loop when
the memristor is subject to a sinusoidal current. (c) Time-domain behavior of charge and flux and
(d) of current and voltage
predicting ability since different periodic input (voltages) yield different periodic
responses (currents) and then different pinched hysteresis loops.
Example 2.6 (Zero-Crossing Property for an Active Ideal Memristor) Let us consider an active charge-controlled memristor with CR ϕ = −13q +
1
3 q 3 . Figure 2.15
shows the hysteresis loop displayed when the memristor is subject to a sinusoidal
current i(t) = 3 sin(t) and q(0) = 0. Note that the loop intersects the second and
fourth quadrant of the v–i plane. Moreover, there are instants such that the voltage
is 0 but the current does not vanish, thus violating the simultaneous zero crossing
property of voltage and current.
