2.4 Genealogy of Memristor Devices
71
Fig. 2.27 Current-voltage characteristics derived from PSpice simulations of the circuit of
Fig. 2.26 under sine-wave input with frequency equal to 10 (plot (a)), 100 (plot (b)), and 1000 Hz
(plot (c))
of the proposed circuit. In particular, the memductance G(x, v) in (2.46) can be
derived from the r.h.s. of (2.49) as follows:
G(x, v g ) =
i L + 2I S
v g
tanh
v g
2nV T
that is bounded in a neighbor of (x, 0) (see also the next Example 2.26). This proves
that the elementary circuit of Fig. 2.26 is a second-order extended memristor. Note
that the key mechanisms at the origin of its memristive behavior are the voltage
constraints involving each pair of parallel diodes, i.e., v 1 = v 3 and v 2 = v 4 .
Figure 2.27 shows the pinched hysteresis loops derived from PSpice simulations
of the circuit in Fig. 2.26 subject to sine-wave inputs with different frequencies.
It is worth to note that if we drop the condition (b) on the boundedness of
R(x, i) or G(x, i) then in general (2.44) and (2.45) or (2.46) and (2.47) do not
define a memristor, since the zero-crossing property might fail ([4, p. 339]). The
next Example 2.26 shows how to exploit condition (b) to write the state-dependent
Ohm’s law in the form (2.46) whereas Example 2.27 makes clear that if such a
property (b) is allowed to fail then we may easily arrive at a nonsense where a twoterminal circuit element without memristive behavior might fall into the class of
extended memristors.
Example 2.26 (State-Dependent Ohm’s Law in the Form (2.46)) Consider a
voltage-controlled extended memristor defined by a general DAE
i = h(x, v)
˙
x = g(x, v)
71
Fig. 2.27 Current-voltage characteristics derived from PSpice simulations of the circuit of
Fig. 2.26 under sine-wave input with frequency equal to 10 (plot (a)), 100 (plot (b)), and 1000 Hz
(plot (c))
of the proposed circuit. In particular, the memductance G(x, v) in (2.46) can be
derived from the r.h.s. of (2.49) as follows:
G(x, v g ) =
i L + 2I S
v g
tanh
v g
2nV T
that is bounded in a neighbor of (x, 0) (see also the next Example 2.26). This proves
that the elementary circuit of Fig. 2.26 is a second-order extended memristor. Note
that the key mechanisms at the origin of its memristive behavior are the voltage
constraints involving each pair of parallel diodes, i.e., v 1 = v 3 and v 2 = v 4 .
Figure 2.27 shows the pinched hysteresis loops derived from PSpice simulations
of the circuit in Fig. 2.26 subject to sine-wave inputs with different frequencies.
It is worth to note that if we drop the condition (b) on the boundedness of
R(x, i) or G(x, i) then in general (2.44) and (2.45) or (2.46) and (2.47) do not
define a memristor, since the zero-crossing property might fail ([4, p. 339]). The
next Example 2.26 shows how to exploit condition (b) to write the state-dependent
Ohm’s law in the form (2.46) whereas Example 2.27 makes clear that if such a
property (b) is allowed to fail then we may easily arrive at a nonsense where a twoterminal circuit element without memristive behavior might fall into the class of
extended memristors.
Example 2.26 (State-Dependent Ohm’s Law in the Form (2.46)) Consider a
voltage-controlled extended memristor defined by a general DAE
i = h(x, v)
˙
x = g(x, v)