Index
621
Reliability of 3D packing, 3, 4, 14, 15, 322,
351, 365, 443, 450, 466, 527, 528,
552, 606, 608, 614
Resin systems, 409
S
Saw dicing, 158, 163, 165, 166, 179–182,
186, 194
Silicon interposer attachment, 299
Solder alloys In microbump, 333
Solder-based bonding, 202, 203, 208
Solder connects, 7–10, 13, 14, 23, 36, 95,
165, 189, 190, 273, 287, 301, 303–
307, 311–319, 321–323, 347–355,
357–361, 365, 444, 471, 472, 474–
481, 483–493, 495–499, 501–508,
510–518, 521–523, 527, 528, 531,
532, 535, 539, 541, 551, 553, 556–
558, 560, 562–567, 569, 575, 577,
580, 581, 594–599, 606, 607, 609,
611
Soldering assembly, 476, 482
Solder-less bonding, 202
Soldermask and surface finish application,
427
Spray cooling, 370, 373, 374
Stacking and bonding schemes, 204
Stresses in Tsvs, 62, 77, 99, 135
Substrate and PWB cores, 405
Substrate raw material selection and preparation, 422
Substrate technology, 398, 428
Summary, 419
Surface Activated Bonding (SAB), 202, 204,
211–215, 217, 219, 220, 225, 226
Surface finishes, 418
T
Task migration, 375, 376
TCB assembly building block, 292, 294
Temperature non-uniformity, 374, 388, 389
Thermal analysis tools, 377
Thermal compression bonding process, 9,
10, 13, 15, 260, 264, 267, 269, 270,
273, 275, 277, 280, 281, 283, 287–
289, 291, 293, 296–298, 300, 303–
308, 312, 313, 319, 322–324, 336,
531
Thermal compression bonding tool, 225,
267–270, 273, 298, 301, 303, 324
Thermal Derating Factor (TDF), 372
Thermal design considerations, 375
Thermal emergencies, 375
Thermal Intensification Factor (TIF), 372
Thermal performance parameters for 3D
ICs, 372
Thermal stress, 13, 31, 32, 51, 63, 213, 221,
363, 419, 431, 433–436, 439, 440,
443–446, 454, 455, 464, 465, 466,
527
Thermo-compression bonding, 8–10, 12, 13,
15, 23, 189, 190, 202, 204, 206, 216,
217, 221, 225, 259–261, 264–275,
277, 280–324, 531
Through-Silicon Vias (TSV), 1–3, 7, 8, 11–
15, 21–25, 28–34, 38–40, 47–54, 58–
66, 71–99, 107, 124–126, 128, 131–
153, 157, 158, 161–163, 169, 174,
189, 194, 201, 202, 223–225, 259–
264, 267, 268, 274, 281, 289, 291–
293, 296–300, 323, 324, 332, 334,
335, 343, 347, 361–366, 369, 374,
376–380, 383–387, 389–392, 433–
443, 465, 473, 527, 528, 536, 537,
543, 544, 545, 553, 557, 559, 562,
565, 567–569, 575–577, 584, 591,
592, 597, 598, 600–602, 608
Through-Silicon Via (TSV) materials and
processes, 50
Time-domain reflectometry, 578–582, 614
TSV memory stacking, 296
TSV placements, 376, 389, 391
TSV processing, 3, 15, 32, 48, 62, 465
TSV reliability, 14, 15, 48, 65, 71, 96, 99,
107, 347, 433, 434, 436, 442, 465,
502, 559, 608
TSV stress, 62, 78, 434
Two-phase cooling, 390, 391
U
Underfill, 13, 14, 23, 27, 34, 36, 40, 189, 191,
194, 260, 264, 275, 277, 281, 282,
286–288, 292, 293, 297, 298, 307,
416, 446–450, 453, 466, 476, 483,
487–490, 495, 497–503, 507, 510–
519, 521, 523, 527, 528, 551, 562,
568, 576, 589, 591, 599, 604, 608,
611, 612
V
Vapor pressure modeling, 459, 461
Variable fin density, 387, 389, 392
Vibrations, 75, 114, 269, 373, 473, 475, 479,
487, 490, 494–497, 499, 500, 516
621
Reliability of 3D packing, 3, 4, 14, 15, 322,
351, 365, 443, 450, 466, 527, 528,
552, 606, 608, 614
Resin systems, 409
S
Saw dicing, 158, 163, 165, 166, 179–182,
186, 194
Silicon interposer attachment, 299
Solder alloys In microbump, 333
Solder-based bonding, 202, 203, 208
Solder connects, 7–10, 13, 14, 23, 36, 95,
165, 189, 190, 273, 287, 301, 303–
307, 311–319, 321–323, 347–355,
357–361, 365, 444, 471, 472, 474–
481, 483–493, 495–499, 501–508,
510–518, 521–523, 527, 528, 531,
532, 535, 539, 541, 551, 553, 556–
558, 560, 562–567, 569, 575, 577,
580, 581, 594–599, 606, 607, 609,
611
Soldering assembly, 476, 482
Solder-less bonding, 202
Soldermask and surface finish application,
427
Spray cooling, 370, 373, 374
Stacking and bonding schemes, 204
Stresses in Tsvs, 62, 77, 99, 135
Substrate and PWB cores, 405
Substrate raw material selection and preparation, 422
Substrate technology, 398, 428
Summary, 419
Surface Activated Bonding (SAB), 202, 204,
211–215, 217, 219, 220, 225, 226
Surface finishes, 418
T
Task migration, 375, 376
TCB assembly building block, 292, 294
Temperature non-uniformity, 374, 388, 389
Thermal analysis tools, 377
Thermal compression bonding process, 9,
10, 13, 15, 260, 264, 267, 269, 270,
273, 275, 277, 280, 281, 283, 287–
289, 291, 293, 296–298, 300, 303–
308, 312, 313, 319, 322–324, 336,
531
Thermal compression bonding tool, 225,
267–270, 273, 298, 301, 303, 324
Thermal Derating Factor (TDF), 372
Thermal design considerations, 375
Thermal emergencies, 375
Thermal Intensification Factor (TIF), 372
Thermal performance parameters for 3D
ICs, 372
Thermal stress, 13, 31, 32, 51, 63, 213, 221,
363, 419, 431, 433–436, 439, 440,
443–446, 454, 455, 464, 465, 466,
527
Thermo-compression bonding, 8–10, 12, 13,
15, 23, 189, 190, 202, 204, 206, 216,
217, 221, 225, 259–261, 264–275,
277, 280–324, 531
Through-Silicon Vias (TSV), 1–3, 7, 8, 11–
15, 21–25, 28–34, 38–40, 47–54, 58–
66, 71–99, 107, 124–126, 128, 131–
153, 157, 158, 161–163, 169, 174,
189, 194, 201, 202, 223–225, 259–
264, 267, 268, 274, 281, 289, 291–
293, 296–300, 323, 324, 332, 334,
335, 343, 347, 361–366, 369, 374,
376–380, 383–387, 389–392, 433–
443, 465, 473, 527, 528, 536, 537,
543, 544, 545, 553, 557, 559, 562,
565, 567–569, 575–577, 584, 591,
592, 597, 598, 600–602, 608
Through-Silicon Via (TSV) materials and
processes, 50
Time-domain reflectometry, 578–582, 614
TSV memory stacking, 296
TSV placements, 376, 389, 391
TSV processing, 3, 15, 32, 48, 62, 465
TSV reliability, 14, 15, 48, 65, 71, 96, 99,
107, 347, 433, 434, 436, 442, 465,
502, 559, 608
TSV stress, 62, 78, 434
Two-phase cooling, 390, 391
U
Underfill, 13, 14, 23, 27, 34, 36, 40, 189, 191,
194, 260, 264, 275, 277, 281, 282,
286–288, 292, 293, 297, 298, 307,
416, 446–450, 453, 466, 476, 483,
487–490, 495, 497–503, 507, 510–
519, 521, 523, 527, 528, 551, 562,
568, 576, 589, 591, 599, 604, 608,
611, 612
V
Vapor pressure modeling, 459, 461
Variable fin density, 387, 389, 392
Vibrations, 75, 114, 269, 373, 473, 475, 479,
487, 490, 494–497, 499, 500, 516