524
P. Vianco and M. Neilsen
emphasis on die stacking in those product lines as opposed to increasing the number
of packages stacked on top of one-another.
Package-on-package and PoPoP components present a viable option for military,
space, and satellite systems. Much of the technology-base developed for stacked
packages by the consumer electronics community can be adapted to their insertion
into high-reliability systems. Additional requirements are placed on PoP and PoPoP
components, which include qualification and acceptance testing as well as more
severe service environments that are unique to these applications and will require
being addressed by design and process engineers. The emphasis on reliability will
continue to favor stacked packages over die stacking in the near future. However,
improvements that are made towards screening known-good die will support a
transition from PoP and PoPoP components to die stacking package technologies.
Acknowledgements The author wishes to thank all of the individuals who have contributed to
the projects that have allowed for the construction of this chapter: Jerry Rejent and Mark Grazier
who performed all of the experimental work, the folks responsible for the microanalysis: Alice
Kilgo, Amy Allen, Bonnie McKenzie, and Richard Grant; as well as the continued support by
D. Simmons, R. Periasamy, and Dan Baker. Also, a “thank you” goes to Brian Wroblewski for
his careful review of the manuscript. Sandia National Laboratories is a multimission laboratory
managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly
owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National
Nuclear Security Administration under contract DE-NA0003525. This paper describes objective
technical results and analysis. Any subjective views or opinions that might be expressed in the
paper do not necessarily represent the views of the U.S. Department of Energy or the United States
Government. The editors would like to thank Luhua Xu from Intel Corporation, and Tae-Kyu Lee
from Portland State University for their critical review of this Chapter.
References
1. R. Johnson, M. Strickland, D. Gerke, 3-d Packaging: A Technology Review (NASA Electronic
Parts Program (NEPP) Report. NASA, Huntsville, AL, 2005)
2. R. Priori, A. Burton, Development of a high reliability and large volume manufacturing
assembly process for a stacked memory package, in Proceedings of International Conference
on Electronics Computer Technology Conference (IEEE, New York, NY, 2004), pp. 1142–1147
3. J. Zhao, L. Yuxiang, H. Zhenyu, M. Rong, Effects of package design on top PoP package
warpage, in Proceedings of International Conference on Electronics Computer Technology
Conference (IEEE, New York, NY, 2008), pp. 1082–1088
4. M. Yim, R. Strode, A. Ravikumar, Y. Chan, Effects of material properties on PoP top package
warpage behaviors, in Proceedings of International Conference on Electronics Computer
Technology Conference (IEEE, New York, NY, 2010), pp. 1071–1076
5. JESD22-B111, Board level drop test method of components for handheld electronic products
(originated, July 2003). JEDEC, 3103 N. 10th St, Suite 240-S, Arlington, VA 22201
6. JESD22-B110, Mechanical shock—component and sub-assembly (revision B, July 2013)
(JEDEC, 3103 N. 10th St, Suite 240-S, Arlington, VA 22201) (2013)
7. V. Wang, D. Maslyk, Analysis of the reliability of package-on-package devices manufactured
using various underfill methods, in Proceedings of International Conference on Electronic
Packaging Technology and High Density Packaging (ICEPT-HDP) (IEEE, New York, NY,
2008). http://doi.org/10.978-1-4244-2740-6/08
P. Vianco and M. Neilsen
emphasis on die stacking in those product lines as opposed to increasing the number
of packages stacked on top of one-another.
Package-on-package and PoPoP components present a viable option for military,
space, and satellite systems. Much of the technology-base developed for stacked
packages by the consumer electronics community can be adapted to their insertion
into high-reliability systems. Additional requirements are placed on PoP and PoPoP
components, which include qualification and acceptance testing as well as more
severe service environments that are unique to these applications and will require
being addressed by design and process engineers. The emphasis on reliability will
continue to favor stacked packages over die stacking in the near future. However,
improvements that are made towards screening known-good die will support a
transition from PoP and PoPoP components to die stacking package technologies.
Acknowledgements The author wishes to thank all of the individuals who have contributed to
the projects that have allowed for the construction of this chapter: Jerry Rejent and Mark Grazier
who performed all of the experimental work, the folks responsible for the microanalysis: Alice
Kilgo, Amy Allen, Bonnie McKenzie, and Richard Grant; as well as the continued support by
D. Simmons, R. Periasamy, and Dan Baker. Also, a “thank you” goes to Brian Wroblewski for
his careful review of the manuscript. Sandia National Laboratories is a multimission laboratory
managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly
owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National
Nuclear Security Administration under contract DE-NA0003525. This paper describes objective
technical results and analysis. Any subjective views or opinions that might be expressed in the
paper do not necessarily represent the views of the U.S. Department of Energy or the United States
Government. The editors would like to thank Luhua Xu from Intel Corporation, and Tae-Kyu Lee
from Portland State University for their critical review of this Chapter.
References
1. R. Johnson, M. Strickland, D. Gerke, 3-d Packaging: A Technology Review (NASA Electronic
Parts Program (NEPP) Report. NASA, Huntsville, AL, 2005)
2. R. Priori, A. Burton, Development of a high reliability and large volume manufacturing
assembly process for a stacked memory package, in Proceedings of International Conference
on Electronics Computer Technology Conference (IEEE, New York, NY, 2004), pp. 1142–1147
3. J. Zhao, L. Yuxiang, H. Zhenyu, M. Rong, Effects of package design on top PoP package
warpage, in Proceedings of International Conference on Electronics Computer Technology
Conference (IEEE, New York, NY, 2008), pp. 1082–1088
4. M. Yim, R. Strode, A. Ravikumar, Y. Chan, Effects of material properties on PoP top package
warpage behaviors, in Proceedings of International Conference on Electronics Computer
Technology Conference (IEEE, New York, NY, 2010), pp. 1071–1076
5. JESD22-B111, Board level drop test method of components for handheld electronic products
(originated, July 2003). JEDEC, 3103 N. 10th St, Suite 240-S, Arlington, VA 22201
6. JESD22-B110, Mechanical shock—component and sub-assembly (revision B, July 2013)
(JEDEC, 3103 N. 10th St, Suite 240-S, Arlington, VA 22201) (2013)
7. V. Wang, D. Maslyk, Analysis of the reliability of package-on-package devices manufactured
using various underfill methods, in Proceedings of International Conference on Electronic
Packaging Technology and High Density Packaging (ICEPT-HDP) (IEEE, New York, NY,
2008). http://doi.org/10.978-1-4244-2740-6/08