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S. Shi et al.
there are no major differences in the challenges for enabling organic substrates for 3D
and non-3D packaging solutions. The information discussed in the following paragraphs is applicable to all organic substrates, including 3D and non 3D packaging
applications alike.
In this chapter, an overview of substrate technology evolution over the past several
decades will be discussed. The materials used in substrates will be reviewed, focus
will be on materials for organic substrates. The discussion will cover key points
of consideration in material selection and application. A general review of the
substrate fabrication technology will be provided. Next, efforts will be made to give
an overview on the individual components of the substrates manufacturing process,
comprising of cores, build-up dielectric layers, metal layers and traces, plated through
holes (PTH) and vias, contact pads, solder mask, and surface finishes. In addition to
the conventional cored substrate process flow, we will also describe a derivative that
is called coreless packaging technology. We will give an overview of the drivers for
coreless substrates and the materials that are used generally, we will also highlight
some of the challenges that are encountered while handling/manufacturing coreless
substrates. General recommendations on applying the appropriate technologies will
be included. The purpose of this chapter is to provide the reader with pointers related
to the key knobs of substrate packaging. A general tone will be maintained and
references will be available for further reading.
14.2 Overview of Substrate Technology Evolution
Since the commercialization of transistors in 1950s, semiconductor technology
advancement has been driving the advancement of substrate technology in the past
half century. Originally designed as simple space transformers that translates the
pitch of the Si die FLI to that of a coarser pitch on the PCB side, substrates have
evolved over time as key components in the enabling of superior computing power.
While substrates still have to transmit electrical power and signals, it is increasingly becoming important that they maintain a certain form factor while delivering
the same or in cases better electrical performance. The line/space (L/S) width (in
micrometers) used in substrates has evolved from 250/250 L/S in 1955 to 200/200
L/S in 1960s–1980s to 100/100 L/S in 1990s and 2000s and through research and
development over the many years, has seen commercialization on products where
less than 10/10 is common place and in some cases L/S as tight as 3/3 can also be
seen [2]. Embedded components in the PWB, in addition to electrical and optics integrated into substrates are emerging areas of development. In the foreseeable future,
organic PWB and package substrates will play a key role to enable faster, thinner
and smaller portable electronics.
Coreless substrates have evolved in the recent past to enable substrates in cases
where the z-height limitations are critical, and the overall package needs to be lighter
and smaller from a package foot print standpoint. Additionally, Coreless substrates,
have lower impedance across the entire frequency range and better power delivery
S. Shi et al.
there are no major differences in the challenges for enabling organic substrates for 3D
and non-3D packaging solutions. The information discussed in the following paragraphs is applicable to all organic substrates, including 3D and non 3D packaging
applications alike.
In this chapter, an overview of substrate technology evolution over the past several
decades will be discussed. The materials used in substrates will be reviewed, focus
will be on materials for organic substrates. The discussion will cover key points
of consideration in material selection and application. A general review of the
substrate fabrication technology will be provided. Next, efforts will be made to give
an overview on the individual components of the substrates manufacturing process,
comprising of cores, build-up dielectric layers, metal layers and traces, plated through
holes (PTH) and vias, contact pads, solder mask, and surface finishes. In addition to
the conventional cored substrate process flow, we will also describe a derivative that
is called coreless packaging technology. We will give an overview of the drivers for
coreless substrates and the materials that are used generally, we will also highlight
some of the challenges that are encountered while handling/manufacturing coreless
substrates. General recommendations on applying the appropriate technologies will
be included. The purpose of this chapter is to provide the reader with pointers related
to the key knobs of substrate packaging. A general tone will be maintained and
references will be available for further reading.
14.2 Overview of Substrate Technology Evolution
Since the commercialization of transistors in 1950s, semiconductor technology
advancement has been driving the advancement of substrate technology in the past
half century. Originally designed as simple space transformers that translates the
pitch of the Si die FLI to that of a coarser pitch on the PCB side, substrates have
evolved over time as key components in the enabling of superior computing power.
While substrates still have to transmit electrical power and signals, it is increasingly becoming important that they maintain a certain form factor while delivering
the same or in cases better electrical performance. The line/space (L/S) width (in
micrometers) used in substrates has evolved from 250/250 L/S in 1955 to 200/200
L/S in 1960s–1980s to 100/100 L/S in 1990s and 2000s and through research and
development over the many years, has seen commercialization on products where
less than 10/10 is common place and in some cases L/S as tight as 3/3 can also be
seen [2]. Embedded components in the PWB, in addition to electrical and optics integrated into substrates are emerging areas of development. In the foreseeable future,
organic PWB and package substrates will play a key role to enable faster, thinner
and smaller portable electronics.
Coreless substrates have evolved in the recent past to enable substrates in cases
where the z-height limitations are critical, and the overall package needs to be lighter
and smaller from a package foot print standpoint. Additionally, Coreless substrates,
have lower impedance across the entire frequency range and better power delivery