20
R. Mahajan and B. Sankman
2. The IP blocks desired for the SOC are available in the same silicon fabrication
process and the resulting chip meets the cost target required to make the product
economically viable.
SIP is preferred for the integration of heterogeneous functions, to improve yield
resiliency, facilitate more comprehensive test coverage, and to help bring products to
market quicker when technical and/or business reasons prevent timely SOC integration. SIPs today are widely used in the electronics industry primarily in mobile
applications (Fig. 2.2). SIP architectures can be broadly classed in three categories (see Fig. 2.3a–e for some representative configurations and recent product
implementations):
1. Planar configurations where two or more die or packages are placed side by side
and connected to each other through lateral interconnects in a multilayer laminate
substrate [9].
2. Stacked configurations where two or more die, or packages, are stacked one on
top of the others and connected through a combination of both lateral and vertical
interconnects [1–3, 10].
3. Hybrid Configurations that combine both the planar and stacked configurations
[7, 11–16].
Fig. 2.2 2018 SIP market by device type. Source TechSearch International
R. Mahajan and B. Sankman
2. The IP blocks desired for the SOC are available in the same silicon fabrication
process and the resulting chip meets the cost target required to make the product
economically viable.
SIP is preferred for the integration of heterogeneous functions, to improve yield
resiliency, facilitate more comprehensive test coverage, and to help bring products to
market quicker when technical and/or business reasons prevent timely SOC integration. SIPs today are widely used in the electronics industry primarily in mobile
applications (Fig. 2.2). SIP architectures can be broadly classed in three categories (see Fig. 2.3a–e for some representative configurations and recent product
implementations):
1. Planar configurations where two or more die or packages are placed side by side
and connected to each other through lateral interconnects in a multilayer laminate
substrate [9].
2. Stacked configurations where two or more die, or packages, are stacked one on
top of the others and connected through a combination of both lateral and vertical
interconnects [1–3, 10].
3. Hybrid Configurations that combine both the planar and stacked configurations
[7, 11–16].
Fig. 2.2 2018 SIP market by device type. Source TechSearch International