18
R. Mahajan and B. Sankman
TIM
Thermal Interface Material
KOZ
Keep Out Zone
CMP
Chemical Mechanical Polishing
ECD
Electro Chemical Deposition
PECVD Plasma Enhanced Chemical Vapor Deposition
PVD
Plasma Vapor Deposition
FEOL
Front End of Line
MEOL Middle End of Line
BEOL Back End of Line
KGD
Known Good Die
PCH
Peripheral Controller Hub
2.1 Introduction
Increasing transistor density as predicted by Moore’s Law [5, 6] has led to increasingly powerful, pervasive interconnected computer systems that enable multiple
consumer and business applications (Fig. 2.1). These computers and associated
networks utilize a wide variety of computing and communication functions that
are implemented within digital circuits (e.g. Microprocessors, Field Programmable
Gate Arrays), memory circuits (e.g. SRAM, DRAM), and analog circuits (e.g. power
supplies, clocks, RF front end modules, amplifiers, SERDES, USB, PCIe, DDR).
Different computing and communication functions can be homogeneously integrated
on a monolithic silicon chip (typically referred to as System on Chip or SOC integration) or heterogeneously on a package (typically referred to as System in Package
(SIP)
1 ). Integration on chip has the advantages of improved signal transmission
fidelity due to reduced interconnect lengths, lower system power due to efficient
on-chip connections between IP
2 blocks, and overall reduced silicon area as a result
of Moore’s Law scaling. Thus, on-chip integration is usually preferred when:
1. The integrated functions can easily be implemented on the same silicon fabrication process. For example, digital logic and SRAM can be built using compatible
silicon processes. Conversely, high performance digital logic and DRAM are
rarely fabricated on similar silicon manufacturing processes, and hence are not
commonly included in the same chip.
1 Heterogeneous Integration refers to the integration of separately manufactured components (e.g.
individual die, MEMS device, passive component, pre-packaged devices etc.) into a higher level
assembly (SiP) that, in the aggregate, provides enhanced functionality and improved operating
characteristics [7].
SIP is considered to be sub-set of the broader concept of System on Package (SOP) [8] where
an entire computer system is built on a package.
2 An IP (Intellectual Property) block is reusable circuit block that performs a certain specialized
functions and serves as a building block for constructing the SOC.
R. Mahajan and B. Sankman
TIM
Thermal Interface Material
KOZ
Keep Out Zone
CMP
Chemical Mechanical Polishing
ECD
Electro Chemical Deposition
PECVD Plasma Enhanced Chemical Vapor Deposition
PVD
Plasma Vapor Deposition
FEOL
Front End of Line
MEOL Middle End of Line
BEOL Back End of Line
KGD
Known Good Die
PCH
Peripheral Controller Hub
2.1 Introduction
Increasing transistor density as predicted by Moore’s Law [5, 6] has led to increasingly powerful, pervasive interconnected computer systems that enable multiple
consumer and business applications (Fig. 2.1). These computers and associated
networks utilize a wide variety of computing and communication functions that
are implemented within digital circuits (e.g. Microprocessors, Field Programmable
Gate Arrays), memory circuits (e.g. SRAM, DRAM), and analog circuits (e.g. power
supplies, clocks, RF front end modules, amplifiers, SERDES, USB, PCIe, DDR).
Different computing and communication functions can be homogeneously integrated
on a monolithic silicon chip (typically referred to as System on Chip or SOC integration) or heterogeneously on a package (typically referred to as System in Package
(SIP)
1 ). Integration on chip has the advantages of improved signal transmission
fidelity due to reduced interconnect lengths, lower system power due to efficient
on-chip connections between IP
2 blocks, and overall reduced silicon area as a result
of Moore’s Law scaling. Thus, on-chip integration is usually preferred when:
1. The integrated functions can easily be implemented on the same silicon fabrication process. For example, digital logic and SRAM can be built using compatible
silicon processes. Conversely, high performance digital logic and DRAM are
rarely fabricated on similar silicon manufacturing processes, and hence are not
commonly included in the same chip.
1 Heterogeneous Integration refers to the integration of separately manufactured components (e.g.
individual die, MEMS device, passive component, pre-packaged devices etc.) into a higher level
assembly (SiP) that, in the aggregate, provides enhanced functionality and improved operating
characteristics [7].
SIP is considered to be sub-set of the broader concept of System on Package (SOP) [8] where
an entire computer system is built on a package.
2 An IP (Intellectual Property) block is reusable circuit block that performs a certain specialized
functions and serves as a building block for constructing the SOC.