8
Strain-Engineered MOSFETs
battery life for wireless devices due to lower leakage currents, which include
gate leakage, subthreshold leakage, and junction leakage. Strain engineering
has become a critical feature now in CMOS technology since it enhances
the drain current without further gate length scaling. Process integration
issues such as power consumption, leakage current, metal gate electrodes,
and high-k gate dielectrics will be covered in this chapter.
1.6 Noise in Strain-Engineered Devices
Among the different types of noise mechanisms present in semiconductors, low-frequency noise, typically observed to exhibit a dependence on
frequency, is very important for analogue and mixed-signal applications.
Low-frequency noise is known to degrade the spectral purity of nonlinear
radio frequency and microwave circuits, such as oscillators and mixers,
where the low-frequency, base band noise generates noise sidebands around
the radio frequency (RF) or microwave carrier signal through up conversion into unwanted phase noise. In Chapter 6, fundamental noise sources
in semiconductors are reviewed and their physical origins are analytically
described. The low-frequency noise is discussed as a diagnostic tool for
identifying traps and defects at the insulator/semiconductor interface, and
as a device lifetime prediction tool for reliability analysis. The low-frequency
noise behaviour in various strain-engineered devices such as strained Si
MOSFETs, multigate FETs, FinFETs, silicon nanowire transistors, and heterojunction bipolar transistors will be discussed. We shall also discuss the
strain effects on MOSFET operations such as threshold voltage, gate tunneling current, and low-frequency noise characteristics. For devices processed
on strained Si, it is reported that the low-frequency noise increases when
Ge from the SiGe buffer diffuses up into the active layer or when threading
dislocations are present. For this purpose, low-frequency noise in strained Si
MOSFETs is extensively studied.
1.7 Technology CAD of Strain-Engineered MOSFETs
Technology computer-aided design (TCAD) simulations allow one to explore
new technologies and novel devices through physics-based modelling, optimise process and device performance, and control manufacturing processes
through statistical modelling. All these are performed on a computer and
are known as virtual wafer fabrication (VWF). Basic TCAD flow is shown in
Figure 1.4. Technology modelling and simulation include the semiconductor
Strain-Engineered MOSFETs
battery life for wireless devices due to lower leakage currents, which include
gate leakage, subthreshold leakage, and junction leakage. Strain engineering
has become a critical feature now in CMOS technology since it enhances
the drain current without further gate length scaling. Process integration
issues such as power consumption, leakage current, metal gate electrodes,
and high-k gate dielectrics will be covered in this chapter.
1.6 Noise in Strain-Engineered Devices
Among the different types of noise mechanisms present in semiconductors, low-frequency noise, typically observed to exhibit a dependence on
frequency, is very important for analogue and mixed-signal applications.
Low-frequency noise is known to degrade the spectral purity of nonlinear
radio frequency and microwave circuits, such as oscillators and mixers,
where the low-frequency, base band noise generates noise sidebands around
the radio frequency (RF) or microwave carrier signal through up conversion into unwanted phase noise. In Chapter 6, fundamental noise sources
in semiconductors are reviewed and their physical origins are analytically
described. The low-frequency noise is discussed as a diagnostic tool for
identifying traps and defects at the insulator/semiconductor interface, and
as a device lifetime prediction tool for reliability analysis. The low-frequency
noise behaviour in various strain-engineered devices such as strained Si
MOSFETs, multigate FETs, FinFETs, silicon nanowire transistors, and heterojunction bipolar transistors will be discussed. We shall also discuss the
strain effects on MOSFET operations such as threshold voltage, gate tunneling current, and low-frequency noise characteristics. For devices processed
on strained Si, it is reported that the low-frequency noise increases when
Ge from the SiGe buffer diffuses up into the active layer or when threading
dislocations are present. For this purpose, low-frequency noise in strained Si
MOSFETs is extensively studied.
1.7 Technology CAD of Strain-Engineered MOSFETs
Technology computer-aided design (TCAD) simulations allow one to explore
new technologies and novel devices through physics-based modelling, optimise process and device performance, and control manufacturing processes
through statistical modelling. All these are performed on a computer and
are known as virtual wafer fabrication (VWF). Basic TCAD flow is shown in
Figure 1.4. Technology modelling and simulation include the semiconductor