265
Process Compact Modelling of Strain-Engineered MOSFETs
9.5 Process-Aware SPICE Parameter Extraction
To extract the model parameters, process and device simulations were
first performed using typical CMOS process flow. The model parameters
extracted are for the nominal process conditions and various drawn gate
lengths. One of the SPICE parameters, namely, voltage (V th ), as a function
of process parameters, has been extracted. In order to validate the compact
SPICE model, for a given set of process conditions and device bias states, I-V
curves obtained from TCAD simulations are compared with those obtained
from Paramos using a process-dependent compact SPICE model card.
Figure 9.15 shows the current-voltage characteristics for a 45 nm n-MOSFET.
The dots show the TCAD simulation data, and the solid lines show the electrical characteristics generated by a global SPICE model.
The compact model parameters for the CMOS devices are extracted
using the BSIM4 MOSFET model. The process-aware model parameters are
extracted from electrical simulations where process parameters such as gate
length, gate oxide thickness, halo dose, extension dose, and rapid thermal
annealing (RTA) were varied. These parameters are selected to model the
process variability because of their primary impact on the electrical characteristics of the device. Table 9.1 summarises the parameters and ranges
chosen for the 45 nm CMOS process optimisation. The influence of process
variation on threshold voltage for p- and n-MOSFETs has been studied.
The process compact model (PCM) is validated by examining the fit of
simulation using Hermite polynomial or neural network models. The fits for
the threshold voltage (V th ) for p- and n-MOSFETs are shown in Figure 9.16(a)
and (b), respectively.
As an example, we have chosen the SPICE model parameter threshold voltage (V th ) extracted as an explicit polynomial function of normalised process
parameter variations P
( )
i
n , as shown in Equation (9.3):
V V
a P
th
th
i
n
i
n
0
∑
∑
=
+
(9.3)
Parameters
Process Parameters
(gate length, oxide thickness,
implantation, and so on)
Unknown Parameters
(halo dose, halo tilt
angle, and so on)
Process Compact
Model (PCM)
Responses
Device Characteristics
(threshold voltage, drive
current, and so on)
FIGURE 9.14
Schematic view of reverse analysis.
Process Compact Modelling of Strain-Engineered MOSFETs
9.5 Process-Aware SPICE Parameter Extraction
To extract the model parameters, process and device simulations were
first performed using typical CMOS process flow. The model parameters
extracted are for the nominal process conditions and various drawn gate
lengths. One of the SPICE parameters, namely, voltage (V th ), as a function
of process parameters, has been extracted. In order to validate the compact
SPICE model, for a given set of process conditions and device bias states, I-V
curves obtained from TCAD simulations are compared with those obtained
from Paramos using a process-dependent compact SPICE model card.
Figure 9.15 shows the current-voltage characteristics for a 45 nm n-MOSFET.
The dots show the TCAD simulation data, and the solid lines show the electrical characteristics generated by a global SPICE model.
The compact model parameters for the CMOS devices are extracted
using the BSIM4 MOSFET model. The process-aware model parameters are
extracted from electrical simulations where process parameters such as gate
length, gate oxide thickness, halo dose, extension dose, and rapid thermal
annealing (RTA) were varied. These parameters are selected to model the
process variability because of their primary impact on the electrical characteristics of the device. Table 9.1 summarises the parameters and ranges
chosen for the 45 nm CMOS process optimisation. The influence of process
variation on threshold voltage for p- and n-MOSFETs has been studied.
The process compact model (PCM) is validated by examining the fit of
simulation using Hermite polynomial or neural network models. The fits for
the threshold voltage (V th ) for p- and n-MOSFETs are shown in Figure 9.16(a)
and (b), respectively.
As an example, we have chosen the SPICE model parameter threshold voltage (V th ) extracted as an explicit polynomial function of normalised process
parameter variations P
( )
i
n , as shown in Equation (9.3):
V V
a P
th
th
i
n
i
n
0
∑
∑
=
+
(9.3)
Parameters
Process Parameters
(gate length, oxide thickness,
implantation, and so on)
Unknown Parameters
(halo dose, halo tilt
angle, and so on)
Process Compact
Model (PCM)
Responses
Device Characteristics
(threshold voltage, drive
current, and so on)
FIGURE 9.14
Schematic view of reverse analysis.