260
Strain-Engineered MOSFETs
them to explore a design’s sensitivity to real physical process parameters.
Seismos and Paramos from Synopsys address two major sources of variability in a design: proximity variations caused by stress and other neighbourhood effects and global variations due to the spread of manufacturing
process parameters across different die and wafers.
Designing circuits with high yield under parameter variations has
emerged as a serious challenge. The process-aware SPICE model is a deterministic model that includes systematic and random process variations
and improves the understanding of the process variability impact design.
FIGURE 9.11
Verification of FinFET in PTM. (After Zhao, W., Predictive Technology Modelling for Scaled
CMOS, PhD thesis, Arizona State University, 2009.)
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