227
Technology CAD of Strain-Engineered MOSFETs
5. What is hybrid orientation technology?
6. Mobility is dependent on substrate orientation. (True/False)
7. What are the sources of process variations?
8. Discuss how process variations affect the device performance. Give
an example.
9. Discuss how process information can be included at the design stage.
10. What is TCAD calibration? Why it is important?
References
1. S. K. Saha, Modeling Process Variability in Scaled CMOS Technology, IEEE
Design Test Comput., 8–16, 2010.
2. C. K. Maiti, S. Chattopadhyay, and L. K. Bera, Strained-Si Heterostructure Field
Effect Devices, CRC Press, Boca Raton, FL, 2007.
3. Synopsys, Inc., Sentaurus Process User Manual, version A-2007.12, Mountain
View, CA, March 2008.
4. Synopsys, Inc., Sentaurus Device User Manual, version A-2007.12, Mountain
View, CA, March 2008.
5. T. Ghani, M. Armstrong, C. Auth, M. Bost, P. Charvat, G. Glass, T. Hoffmann,
K. Johnson, C. Kenyon, J. Klaus, B. McIntyre, K. Mistry, A. Murthy, J. Sandford,
M. Silberstein, S. Sivakumar, P. Smith, K. Zawadzki, S. Thompson, and M. Bohr,
A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm
Gate Length Strained Silicon CMOS Transistors, IEEE IEDM Tech. Dig., 978–
980, 2003.
6. T. K. Maiti, S. S. Mahato, S. K. Sarkar, and C. K. Maiti, Performance Enhancement
of p-MOSFETs with Embedded SiGe Source/Drain on Hybrid Orientation
Substrates, Proc. Int. Conf. Ultimate Integration Silicon (ULIS 2007), Belgium, pp.
26–30, 2007.
7. Y.-C. Yeo, J. Sun, and E. H. Ong, Strained Channel Transistor Using Strain Field
Induced by Source and Drain Stressors, Proc. Mat. Res. Soc. Symp., 809, B10.4.1–
B10.4.6, 2004.
8. J. G. Fiorenza, J.-S. Park, and A. Lochtefeld, Detailed Simulation Study of a
Reverse Embedded-SiGe Strained-Silicon MOSFET, IEEE Trans. Electron Dev.,
55, 640–648, 2008.
9. R. A. Donaton, D. Chidambarrao, J. Johnson, P. Chang, Y. Liu, W. K.
Henson, J. Holt, X. Li, J. Li, A. Domenicucci, A. Madan, K. Rim, and C. Wann,
Design and Fabrication of MOSFETs with a Reverse Embedded SiGe (Rev.
e-SiGe) Structure, IEEE IEDM Tech. Dig., 465–468, 2006.
10. Silvaco International, ATHENA/ATLAS User’s Manual, Santa Clara, CA, USA,
2009.
Technology CAD of Strain-Engineered MOSFETs
5. What is hybrid orientation technology?
6. Mobility is dependent on substrate orientation. (True/False)
7. What are the sources of process variations?
8. Discuss how process variations affect the device performance. Give
an example.
9. Discuss how process information can be included at the design stage.
10. What is TCAD calibration? Why it is important?
References
1. S. K. Saha, Modeling Process Variability in Scaled CMOS Technology, IEEE
Design Test Comput., 8–16, 2010.
2. C. K. Maiti, S. Chattopadhyay, and L. K. Bera, Strained-Si Heterostructure Field
Effect Devices, CRC Press, Boca Raton, FL, 2007.
3. Synopsys, Inc., Sentaurus Process User Manual, version A-2007.12, Mountain
View, CA, March 2008.
4. Synopsys, Inc., Sentaurus Device User Manual, version A-2007.12, Mountain
View, CA, March 2008.
5. T. Ghani, M. Armstrong, C. Auth, M. Bost, P. Charvat, G. Glass, T. Hoffmann,
K. Johnson, C. Kenyon, J. Klaus, B. McIntyre, K. Mistry, A. Murthy, J. Sandford,
M. Silberstein, S. Sivakumar, P. Smith, K. Zawadzki, S. Thompson, and M. Bohr,
A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm
Gate Length Strained Silicon CMOS Transistors, IEEE IEDM Tech. Dig., 978–
980, 2003.
6. T. K. Maiti, S. S. Mahato, S. K. Sarkar, and C. K. Maiti, Performance Enhancement
of p-MOSFETs with Embedded SiGe Source/Drain on Hybrid Orientation
Substrates, Proc. Int. Conf. Ultimate Integration Silicon (ULIS 2007), Belgium, pp.
26–30, 2007.
7. Y.-C. Yeo, J. Sun, and E. H. Ong, Strained Channel Transistor Using Strain Field
Induced by Source and Drain Stressors, Proc. Mat. Res. Soc. Symp., 809, B10.4.1–
B10.4.6, 2004.
8. J. G. Fiorenza, J.-S. Park, and A. Lochtefeld, Detailed Simulation Study of a
Reverse Embedded-SiGe Strained-Silicon MOSFET, IEEE Trans. Electron Dev.,
55, 640–648, 2008.
9. R. A. Donaton, D. Chidambarrao, J. Johnson, P. Chang, Y. Liu, W. K.
Henson, J. Holt, X. Li, J. Li, A. Domenicucci, A. Madan, K. Rim, and C. Wann,
Design and Fabrication of MOSFETs with a Reverse Embedded SiGe (Rev.
e-SiGe) Structure, IEEE IEDM Tech. Dig., 465–468, 2006.
10. Silvaco International, ATHENA/ATLAS User’s Manual, Santa Clara, CA, USA,
2009.