80
Strain-Engineered MOSFETs
TSV stress. The keep-out zone can be defined in the region from peak stress
to the bottom stress. Within the keep-out zone, the device performance varies from location to location, while device performance is not sensitive to
the stress effect outside the keep-out zone. Inside the keep-out zone, the
stress is significant to impact the device performance, so there are no devices
allowed in this zone, leading to more area cost during the TSV process.
However, KOZ can be utilised with a stress-aware design for area efficiency.
Figure 3.19(a) shows the mobility variation changes with the distance. The
mobility enhancement factor decays over the distance from the TSV edge; the
farther the device is located, the less stress effect and less mobility variation.
10
–4
10
–7
Fixed t ox and N a
10
–6
r TSV (m)
(a)
10
–5
10
–3
Normalised Metrics
10
–2
10
–1
10
0
10
1
10
2
V th
R
C total
10
0
10
–7
Fixed t ox and N a
10
–6
r TSV (m)
(b)
10
–5
10
1
Normalised Area
Normalised Metrics
10
2
10
3
10
4
10
–3
10
–2
10
–1
10
0
10
1
Area
RC
FIGURE 3.17
(a) Threshold voltage, resistance, and capacitance change with various metal radii. (b) Tradeoff between RC delay and TSV area. (After Wang, C.-C., Predictive Modelling for Extremely
Scaled CMOS and Post Silicon Devices, PhD thesis, Arizona State University, 2011.)