24.6 Thin-Film Transistors
735
InAlAs
In Ga As
InAlAs
buffer
0.53
0.47
0.52
0.48
graded
InAlGaAs
buffer
(b)
(a)
Fig. 24.48 Cross-sectional TEM image of an InAlAs/InGaAs MHEMT: a Active layer with rms surface roughness of
2.0 nm (from AFM), b graded InGaAlAs buffer layer (1.5 µm) on GaAs substrate. Adapted from [2111]
Fig. 24.49 Cross-sectional TEM image of the 70-nm gate of an InAlAs MHEMT on GaAs substrate. From [2110]
(a)
(b)
(c)
(d)
Fig. 24.50 Schematic geometries of TFTs: a–c MISFETs, d MESFET with a, b bottom gate and c, d top gate. Semiconductor channel layer (light grey), insulating dielectric (dark grey) and metals (black)
735
InAlAs
In Ga As
InAlAs
buffer
0.53
0.47
0.52
0.48
graded
InAlGaAs
buffer
(b)
(a)
Fig. 24.48 Cross-sectional TEM image of an InAlAs/InGaAs MHEMT: a Active layer with rms surface roughness of
2.0 nm (from AFM), b graded InGaAlAs buffer layer (1.5 µm) on GaAs substrate. Adapted from [2111]
Fig. 24.49 Cross-sectional TEM image of the 70-nm gate of an InAlAs MHEMT on GaAs substrate. From [2110]
(a)
(b)
(c)
(d)
Fig. 24.50 Schematic geometries of TFTs: a–c MISFETs, d MESFET with a, b bottom gate and c, d top gate. Semiconductor channel layer (light grey), insulating dielectric (dark grey) and metals (black)