E1C06 09/14/2010
11:55:6 Page 231
where h E i t
ð Þ
f
g defines a mathematical function. The simplest amplifier is the linear scaling
amplifier in which
h E i t
ð Þ
f
g¼ GE i t
ð Þ
ð6:43Þ
where the gain G is a constant that may be any positive or negative value. Many other types of
operation are possible, including the ‘‘base x’’ logarithmic amplifier in which
h E i t
ð Þ
f
g¼ G log x E i t
ð Þ
ð
Þ
ð6:44Þ
Amplifiers have a finite frequency response and limited input voltage range.
The most widely used type of amplifier is the solid-state operational amplifier. This device is
characterized by a high input impedance Z i > 10
7
V
À
Á
, a low output impedance Z o < 100 V
ð
Þ , and a
high internal gain A o % 10
5 to 10
6
À
Á
. As shown in the general diagram of Figure 6.19a, an
operational amplifier has two input ports, a noninverting and an inverting input, and one output
port. The signal at the output port is in phase with a signal passed through the noninverting input port
but is 180 degrees out of phase with a signal passed through the inverting input port. The amplifier
requires dual-polarity DC excitation power ranging from Æ5 V to Æ15 V. In addition, two DC
voltage offset null (bias) input ports provide a means to zero out any output offset signal at zero
input; usually a variable 10 kV resistor is placed across these inputs to adjust offset null.
As an example, the pin connection layout of a common operational amplifier circuit, the type
741, is shown in Figure 6.19b in its eight-pin, dual-in-line ceramic package form. This is the familiar
rectangular black integrated circuit package seen on circuit boards. Each pin port is numbered and
labeled as to function. An internal schematic diagram is shown in Figure 6.19c with the
corresponding pin connections labeled. As shown, each input port (i.e., 2 and 3) is attached to
the base of an npn transistor.
The high internal open loop gain, A o , of an operational amplifier is given as
E o ¼ A o E i 2 t
ð Þ À E i 1 t
ð Þ
ð
Þ
ð 6:45Þ
The magnitude of A o , flat at low frequencies, falls off rapidly at high frequencies, but this intrinsic
gain curve is overcome by using external input and feedback resistors that set the circuit gain G and
circuit response. Some possible amplifier configurations using an operational amplifier are shown in
Figure 6.20.
Because the amplifier has a very high internal gain and negligible current draw, resistors R 1 and
R 2 are used to form a feedback loop and control the overall amplifier circuit gain, called the
closed loop gain, G. The noninverting linear scaling amplifier circuit of Figure 6.20a has a closed
loop gain of
G ¼
E o t
ð Þ
E i t
ð Þ
¼
R 1 þ R 2
R 2
ð6:46Þ
Resistor R s does not affect the gain but is used to balance out potential variation problems at small
currents. Its value is selected such that R s % R 1 R 2 = R 1 þ R 2
ð
Þ . The inverting linear scaling amplifier
circuit of Figure 6.20b provides a gain of
G ¼
E o t
ð Þ
E i t
ð Þ
¼
R 2
R 1
ð6:47Þ
By utilizing both inputs, the arrangement forms a differential amplifier, Figure 6.20c, in which
E o t
ð Þ ¼ E i 2 t
ð Þ À E i 1 t
ð Þ
ð
ÞR 2 =R 1
ð
Þ
ð6:48Þ
6.6 Analog Signal Conditioning: Amplifiers 231
11:55:6 Page 231
where h E i t
ð Þ
f
g defines a mathematical function. The simplest amplifier is the linear scaling
amplifier in which
h E i t
ð Þ
f
g¼ GE i t
ð Þ
ð6:43Þ
where the gain G is a constant that may be any positive or negative value. Many other types of
operation are possible, including the ‘‘base x’’ logarithmic amplifier in which
h E i t
ð Þ
f
g¼ G log x E i t
ð Þ
ð
Þ
ð6:44Þ
Amplifiers have a finite frequency response and limited input voltage range.
The most widely used type of amplifier is the solid-state operational amplifier. This device is
characterized by a high input impedance Z i > 10
7
V
À
Á
, a low output impedance Z o < 100 V
ð
Þ , and a
high internal gain A o % 10
5 to 10
6
À
Á
. As shown in the general diagram of Figure 6.19a, an
operational amplifier has two input ports, a noninverting and an inverting input, and one output
port. The signal at the output port is in phase with a signal passed through the noninverting input port
but is 180 degrees out of phase with a signal passed through the inverting input port. The amplifier
requires dual-polarity DC excitation power ranging from Æ5 V to Æ15 V. In addition, two DC
voltage offset null (bias) input ports provide a means to zero out any output offset signal at zero
input; usually a variable 10 kV resistor is placed across these inputs to adjust offset null.
As an example, the pin connection layout of a common operational amplifier circuit, the type
741, is shown in Figure 6.19b in its eight-pin, dual-in-line ceramic package form. This is the familiar
rectangular black integrated circuit package seen on circuit boards. Each pin port is numbered and
labeled as to function. An internal schematic diagram is shown in Figure 6.19c with the
corresponding pin connections labeled. As shown, each input port (i.e., 2 and 3) is attached to
the base of an npn transistor.
The high internal open loop gain, A o , of an operational amplifier is given as
E o ¼ A o E i 2 t
ð Þ À E i 1 t
ð Þ
ð
Þ
ð 6:45Þ
The magnitude of A o , flat at low frequencies, falls off rapidly at high frequencies, but this intrinsic
gain curve is overcome by using external input and feedback resistors that set the circuit gain G and
circuit response. Some possible amplifier configurations using an operational amplifier are shown in
Figure 6.20.
Because the amplifier has a very high internal gain and negligible current draw, resistors R 1 and
R 2 are used to form a feedback loop and control the overall amplifier circuit gain, called the
closed loop gain, G. The noninverting linear scaling amplifier circuit of Figure 6.20a has a closed
loop gain of
G ¼
E o t
ð Þ
E i t
ð Þ
¼
R 1 þ R 2
R 2
ð6:46Þ
Resistor R s does not affect the gain but is used to balance out potential variation problems at small
currents. Its value is selected such that R s % R 1 R 2 = R 1 þ R 2
ð
Þ . The inverting linear scaling amplifier
circuit of Figure 6.20b provides a gain of
G ¼
E o t
ð Þ
E i t
ð Þ
¼
R 2
R 1
ð6:47Þ
By utilizing both inputs, the arrangement forms a differential amplifier, Figure 6.20c, in which
E o t
ð Þ ¼ E i 2 t
ð Þ À E i 1 t
ð Þ
ð
ÞR 2 =R 1
ð
Þ
ð6:48Þ
6.6 Analog Signal Conditioning: Amplifiers 231