10.8 Racetrack Memory
257
10.8.2 Advantages and Disadvantages
The major benefit of racetrack memory is its cost-effectiveness. Drives using racetrack memory will also be considerably cheaper than flash memory. This is because
the racetrack memory can bundle massive amount of data onto single nanowires.
Reading and writing of data are much faster than that of any existing technology. It is
predicted that it will be able to read or write a bit of information in ten nanoseconds
or less. By contrast, a hard disk would take around three million nanoseconds to do
the same.
Racetrack memory is still considered an experimental technology. Tackling
the movement of domain wall in nanoscale is controlled by quantum mechanical
phenomena. One of the major challenges encountered is with domain wall motion.
They are capable of moving or stopping at random, with no definite way of prevention. Another frequent challenge is the significant reduction of read/write times even
due to the smallest imperfection in the wire.
10.8.3 How Does it Work?
Racetrack memory relies on spintronics. Here, data are stored as a sequence of
magnetic domains along a nanowire. There are two promising approaches to encode
bits: (i) by nanoscale domain walls (DW) or (ii) by skyrmions. The main challenges
here are to make smaller bits and then efficiently move these at high speeds.
RM With DW Motion: Spin transfer torque (STT) concept is applied to displace
domain wall (DW) by flowing an electrical current through DW. Domain wall
displacement as discussed in Chap. 6 can be utilized to fabricate a racetrack memory
as a high-density shift register memory as shown in Fig. 10.21. It consists of an
array of magnetic nanowires, measuring around 50 nm in diameter, set horizontally
or vertically on a silicon chip. These nanowire structures are known as so-called
racetrack coined by IBM researcher Stuart Parkin in 2007. The nanowires are like
skyscrapers with each floor of each skyscraper containing a single bit of data. A
transistor at the bottom of the wire shoots spin-polarized electric currents up and
down the wires, which moves the data up and down. Like other electronic memory,
the racetrack memory employs reading and writing heads located near the storage
medium. However, it also significantly differs from the existing electronic memory.
It does not write just to a single side of the storage medium. Instead, it writes on
the whole of ‘domain wall’ of the nanowires. Information is written by a domain
injection pad and read by a spin tunnel junction at the end of the wire. This technique
employs multiple magnetic domain walls per racetrack. Bit length is defined by the
spacing between successive magnetic domain walls and is controlled by pinning
sites. Practically, domain walls need to be pinned at precise positions following the
wall motion is induced by a current. This enables the device to store huge data on a
single wire and makes an example of 3D data storage.
257
10.8.2 Advantages and Disadvantages
The major benefit of racetrack memory is its cost-effectiveness. Drives using racetrack memory will also be considerably cheaper than flash memory. This is because
the racetrack memory can bundle massive amount of data onto single nanowires.
Reading and writing of data are much faster than that of any existing technology. It is
predicted that it will be able to read or write a bit of information in ten nanoseconds
or less. By contrast, a hard disk would take around three million nanoseconds to do
the same.
Racetrack memory is still considered an experimental technology. Tackling
the movement of domain wall in nanoscale is controlled by quantum mechanical
phenomena. One of the major challenges encountered is with domain wall motion.
They are capable of moving or stopping at random, with no definite way of prevention. Another frequent challenge is the significant reduction of read/write times even
due to the smallest imperfection in the wire.
10.8.3 How Does it Work?
Racetrack memory relies on spintronics. Here, data are stored as a sequence of
magnetic domains along a nanowire. There are two promising approaches to encode
bits: (i) by nanoscale domain walls (DW) or (ii) by skyrmions. The main challenges
here are to make smaller bits and then efficiently move these at high speeds.
RM With DW Motion: Spin transfer torque (STT) concept is applied to displace
domain wall (DW) by flowing an electrical current through DW. Domain wall
displacement as discussed in Chap. 6 can be utilized to fabricate a racetrack memory
as a high-density shift register memory as shown in Fig. 10.21. It consists of an
array of magnetic nanowires, measuring around 50 nm in diameter, set horizontally
or vertically on a silicon chip. These nanowire structures are known as so-called
racetrack coined by IBM researcher Stuart Parkin in 2007. The nanowires are like
skyscrapers with each floor of each skyscraper containing a single bit of data. A
transistor at the bottom of the wire shoots spin-polarized electric currents up and
down the wires, which moves the data up and down. Like other electronic memory,
the racetrack memory employs reading and writing heads located near the storage
medium. However, it also significantly differs from the existing electronic memory.
It does not write just to a single side of the storage medium. Instead, it writes on
the whole of ‘domain wall’ of the nanowires. Information is written by a domain
injection pad and read by a spin tunnel junction at the end of the wire. This technique
employs multiple magnetic domain walls per racetrack. Bit length is defined by the
spacing between successive magnetic domain walls and is controlled by pinning
sites. Practically, domain walls need to be pinned at precise positions following the
wall motion is induced by a current. This enables the device to store huge data on a
single wire and makes an example of 3D data storage.
