10.4 Magnetic Random Access Memories (MRAM)
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free magnetic layer, a tunnelling barrier and a fixed magnetic layer (Fig. 10.8b). The
fixed layer magnetization is pinned against the rotation under the application of a
magnetic field through exchange coupling to additional antiferromagnetic layer. It is
the magnetization orientation of the free ferromagnetic layer that is utilized for the
storing of information. Depending on the parallel or antiparallel orientation of the
magnetization between the free and fixed ferromagnetic layer, the resistance of the
memory bit becomes either low or high. This approach is somewhat similar to the
GMR spin valve memory cell. The condition to be achieved here is that the free layer
magnetization reverses its direction for a write operation, whereas the magnetization
of another ferromagnetic layer is fixed. Crucial point that needs to be understood is
that the fixed ferromagnetic layer must rigidly hold its magnetization direction even
when exposed to applied magnetic fields that switch the free ferromagnetic layer.
Such condition could be achieved either through pinning by the incorporation of an
adjacent antiferromagnetic layer or simply the ferromagnetic layer may be composed
of a high-coercivity material.
Write Operation of MRAM—In an attempt to execute ‘Write Operation’, a small
electrical current is driven in the write lines that in turn create a magnetic field.
Such magnetic field causes flipping of magnetic moments in the storage layer of
the MTJ, thereby accomplish writing of binary data in two possible orientations of
those magnetic moments. This, in turn, causes variation in the resistance of those
MTJ cells. Generally, data are read through the tunnelling current or resistance of the
MTJ. Indeed, a low power solution is the requirement for these frequently occurring
‘write operation’. The process involved with the write operation is divided into two
parts:
Bit-cell value detection: In order to identify an already stored bit-cell, its resistance
state must be detected by driving a test current through it. As discussed earlier, such
operation is accomplished employing a memory read operation and is referred to as
Internal Read Operation.
Actual write operation: Once the bit-cell value is identified, it is then compared
with the value to be written. If the existing value is different from the value to be
written, then the actual write operation is done. Otherwise, there is no question of
write operation. This intriguing conditional implementation of write operation is
accomplished employing a special write activation circuit.
Read Operation of MRAM—At the onset, we must highlight the fact that in
case of MRAM, information is stored in the relative orientation of the magnetization of the two ferromagnetic layers. Earlier, storing phenomenon lies in the
charging/discharging of capacitors. This information storing, based on magnetization orientation, in turn, promises for scaling down towards tiny structures, at least,
in terms of output signal. Initially, the difference between reading of ‘1’ and ‘0’ was
about 1 mV in practical devices. The application was confined to mainly for military
applications, small capacity non-volatile memories and 16 Kbit integrated MRAM
chips. In order to select the cell for reading is to introduce an isolation transistor in
each cell.
Figure 10.9 exhibits the typical response of resistance of a MTJ bit as a function
of applied magnetic field. Let us suppose a magnetic field is applied along the length
239
free magnetic layer, a tunnelling barrier and a fixed magnetic layer (Fig. 10.8b). The
fixed layer magnetization is pinned against the rotation under the application of a
magnetic field through exchange coupling to additional antiferromagnetic layer. It is
the magnetization orientation of the free ferromagnetic layer that is utilized for the
storing of information. Depending on the parallel or antiparallel orientation of the
magnetization between the free and fixed ferromagnetic layer, the resistance of the
memory bit becomes either low or high. This approach is somewhat similar to the
GMR spin valve memory cell. The condition to be achieved here is that the free layer
magnetization reverses its direction for a write operation, whereas the magnetization
of another ferromagnetic layer is fixed. Crucial point that needs to be understood is
that the fixed ferromagnetic layer must rigidly hold its magnetization direction even
when exposed to applied magnetic fields that switch the free ferromagnetic layer.
Such condition could be achieved either through pinning by the incorporation of an
adjacent antiferromagnetic layer or simply the ferromagnetic layer may be composed
of a high-coercivity material.
Write Operation of MRAM—In an attempt to execute ‘Write Operation’, a small
electrical current is driven in the write lines that in turn create a magnetic field.
Such magnetic field causes flipping of magnetic moments in the storage layer of
the MTJ, thereby accomplish writing of binary data in two possible orientations of
those magnetic moments. This, in turn, causes variation in the resistance of those
MTJ cells. Generally, data are read through the tunnelling current or resistance of the
MTJ. Indeed, a low power solution is the requirement for these frequently occurring
‘write operation’. The process involved with the write operation is divided into two
parts:
Bit-cell value detection: In order to identify an already stored bit-cell, its resistance
state must be detected by driving a test current through it. As discussed earlier, such
operation is accomplished employing a memory read operation and is referred to as
Internal Read Operation.
Actual write operation: Once the bit-cell value is identified, it is then compared
with the value to be written. If the existing value is different from the value to be
written, then the actual write operation is done. Otherwise, there is no question of
write operation. This intriguing conditional implementation of write operation is
accomplished employing a special write activation circuit.
Read Operation of MRAM—At the onset, we must highlight the fact that in
case of MRAM, information is stored in the relative orientation of the magnetization of the two ferromagnetic layers. Earlier, storing phenomenon lies in the
charging/discharging of capacitors. This information storing, based on magnetization orientation, in turn, promises for scaling down towards tiny structures, at least,
in terms of output signal. Initially, the difference between reading of ‘1’ and ‘0’ was
about 1 mV in practical devices. The application was confined to mainly for military
applications, small capacity non-volatile memories and 16 Kbit integrated MRAM
chips. In order to select the cell for reading is to introduce an isolation transistor in
each cell.
Figure 10.9 exhibits the typical response of resistance of a MTJ bit as a function
of applied magnetic field. Let us suppose a magnetic field is applied along the length