16
2 Front-End Electronics
2.3 Design Requirements
The main analogue design requirements for both detectors are presented in Table 2.3.
They remain mostly the same as before the upgrade and are primarily based on the
properties of the detectors and the signal quality required for recreating particle
tracks in the offline analysis with sufficient precision. For further information on the
analogue design and requirements see [16, 17] respectively. The digital requirements
will be further discussed in this section.
Table 2.3 Design specifications for the SAMPA ASIC [17], taken from simulations
Specification
TPC
Muon Chambers
Voltage supply
1.25 V
1.25 V
Polarity
Negative
Positive
Detector capacitance (C d )
18.5 pF
40 pF–80 pF
Peaking time (t s )
160 ns
300 ns
Noise (Equivalent Noise
Charge (ENC))
<600 e*
<950 e@40 pF*
<1600 e@80 pF*
Linear Range
100 fC / 67 fC
500 fC
Sensitivity
20 mV/fC / 30 mV/fC
4 mV/fC
Return to baseline time
<288 ns
<541 ns
Non-Linearity (CSA + Shaper) <1%
<1%
Crosstalk
<0.3%
<0.2%
ADC effective input range
2 Vpp
2 Vpp
ADC resolution
10-bit
10-bit
Sampling Frequency
10 MSps or 20 MSps
10 MSps
Integrated Non-Linearity
(ADC)
<0.65 LSB
<0.65 LSB
Differential Non-Linearity
(ADC)
<0.6 LSB
<0.6 LSB
Spurious Free Dynamic Range
(ADC) **
68 dBc
68 dBc
Signal-to-Noise And
Distortion (ADC) **
57 dB
57 dB
Effective Number Of Bits
(ADC)
>9.2 bit
>9.2 bit
Power consumption (per ch)
ADC
2 mW (4 mW)
2 mW (4 mW)
CSA + Shaper
6 mW
6 mW
Channels per chip
32
32
* R esd = 70
** @ 0.5 MHz, 10 MSps